axienet_mdio_write(9)
π axienet_mdio_write(9) π
okay so bestie, this page is from the Kernel API Manual, and it's literally all about axienet_mdio_write β the MDIO interface write function. periodt. π
πΈ NAME πΈ
axienet_mdio_write β MDIO interface write function.
β¨ SYNOPSIS β¨
int axienet_mdio_write (struct mii_bus *bus , int phy_id , int reg , u16
val );
π ARGUMENTS π
busβ a pointer to themiibus structure. it's giving βknow which bus you're on,β yk? πphy_idβ the address of the PHY device. lowkey important, bestie. πregβ the PHY register to write to. pick your register, no cap. π―valβ the value to be written into the register. the actual payload. π
π RETURN π
0 on success, -ETIMEDOUT on a timeout. so 0 is the slay outcome, and -ETIMEDOUT means the timeout said βnot today.β π
π₯ DESCRIPTION π₯
so here's the whole write flow: it writes the value to the requested register by first writing the value into the MWD register. then the MCR register is appropriately setup to finish the write operation. that's the move. no extra invented steps, i promise. π«Ά
π¦ SEE ALSO π¦
- Kernel file
./drivers/net/ethernet/xilinx/xilinx_axienet_mdio.cβ the source file, iconic. π axienet_mdio_wait_until_ready(9)axienet_mdio_mdc_enable(9)axienet_mdio_mdc_disable(9)axienet_mdio_read(9)axienet_mdio_enable(9)axienet_mdio_setup(9)axienet_mdio_teardown(9)
cute sign-off: source/version is ./drivers/net/ethernet/xilinx, the date is October 2026, and this is the axienet_mdio_write(9) page. stay hydrated and may all your registers write on the first try πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms