ath5k_hw_che...eacon_timers(9)
π ath5k_hw_check_beacon_timers β the check-beacon-timers situation
okay so this is from the Kernel API Manual, section 9 (kernel routines, iykyk), and the function we're stanning today is ath5k_hw_check_beacon_timers(9) π
β¨ NAME β¨
ath5k_hw_check_beacon_timers β literally just checks whether the beacon timers are correct π
πΈ SYNOPSIS πΈ
bool ath5k_hw_check_beacon_timers (struct ath5k_hw *ah , int intval );
π¦ ARGUMENTS π¦
ahβ thestruct ath5k_hw, your main character struct πintvalβ the beacon interval
π₯ DESCRIPTION π₯
So bestie, this whole function is a workaround for IBSS mode. A workaround! She's doing her best π«Ά
Here's the lore. We have 4 separate HW timer registers (TIMER0 β TIMER3), and they're closely related to the next beacon target time (NBTT). The HW updates these timers separately, based on the current TSF value. Every time the local TSF converted to TU equals the value stored in a timer, the hardware increments that timer by the beacon interval. Cute, right? Iconic, even.
But π β receiving a beacon with the same BSSID can update the local HW TSF at any time, and that's just something we can't avoid, no cap. So if the TSF jumps to a time that's later than the time stored in a timer, that timer won't get updated until the TSF in TU wraps around at 16 bit (which is the size of the timers, fun fact) and finally reaches the time stored in the timer. Not me waiting a whole wrap-around for a timer update π
Here's the actual problem: these timers are closely related to TIMER0 (NBTT), and together they define a time "window". When the TSF jumps between two timers (say, ATIM and NBTT), the one sitting in the past gets left behind (not updated, rude) while the one in the future gets updated every single beacon interval. So the window keeps getting larger, until the TSF wraps around like we described and the abandoned timer finally gets updated again. But β and this is the plot twist β because the beacon interval is usually not an exact divisor of the size of the timers (16 bit), an unwanted "window" has developed between these timers! π
This matters especially with the ATIM window, because during the ATIM window only ATIM frames are allowed β no data frames β which creates transmission pauses after each beacon. This whole symptom has been described as "ramping ping", because ping times increase linearly for some time and then drop back down again. And a wrong window on the DMA beacon timer has the exact same effect, so we check for these two conditions. Periodt.
Returns true if O.K. β
π SEE ALSO π
Kernel file ./drivers/net/wireless/ath/ath5k/pcu.cProtocol Control Unit (PCU) functions(9)ACK rates(9)ath5k_hw_get_frame_duration(9)ath5k_hw_get_default_slottime(9)ath5k_hw_get_default_sifs(9)ath5k_hw_update_mib_counters(9)ath5k_hw_write_rate_duration(9)ath5k_hw_set_ack_timeout(9)ath5k_hw_set_cts_timeout(9)ath5k_hw_set_lladdr(9)ath5k_hw_set_bssid(9)ath5k_hw_set_bssid_mask(9)ath5k_hw_set_mcast_filter(9)ath5k_hw_get_rx_filter(9)ath5k_hw_set_rx_filter(9)ath5k_hw_get_tsf64(9)ath5k_hw_set_tsf64(9)ath5k_hw_reset_tsf(9)ath5k_hw_init_beacon_timers(9)ath5k_check_timer_win(9)ath5k_hw_set_coverage_class(9)ath5k_hw_start_rx_pcu(9)ath5k_hw_stop_rx_pcu(9)ath5k_hw_set_opmode(9)ath5k_hw_pcu_init(9)
π‘ lowkey the whole vibe here: timers drift, windows grow, ping ramps. Check both conditions or the vibes are off. fr fr.
okay that's the whole page, bestie π§ this iconic little number lives at ./drivers/net/wireless/ath/ath5k, dated October 2026, and it's filed as ath5k_hw_che...eacon_timers(9) β slay, go check those timers π
β¨π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms