amdgpu_ib_schedule(9)
π amdgpu_ib_schedule(9) β the Kernel API Manual, but make it cute
okay so bestie, welcome to the Kernel API Manual entry for our girl amdgpu_ib_schedule, coming at you from the amdgpu kernel docs. she's giving driver-dev main character energy and we're gonna get into all of it π
β¨ NAME β¨
amdgpu_ib_schedule β schedule an IB (that's an Indirect Buffer, iykyk) on the ring. literally her whole job π
π¦ SYNOPSIS π¦
int amdgpu_ib_schedule (struct amdgpu_ring *ring , unsigned int num_ibs
, struct amdgpu_ib *ibs , struct amdgpu_job *job , struct dma_fence **f
);
π ARGUMENTS π
ringβ the ring index this IB is associated with. it's giving "where does this belong" energy πΈnum_ibsβ how many IBs we're scheduling. the count, the number, the vibe check βibsβ the actual IB objects to schedule. these are the ones doing the work fr fr π«Άjobβ the job to schedule. yes bestie, a whole job ποΈfβ the fence created during this submission. keeping things orderly, no cap π₯
π DESCRIPTION π
So the whole point: schedule an IB on the associated ring, and this applies to all asics (yes, all of them, we love an inclusive queen π). She returns 0 on success, and an error on failure. periodt.
Now buckle up because here's the lore, and honestly it's iconic:
On SI, there are two parallel engines fed from the primary ring β the CE (Constant Engine) and the DE (Drawing Engine). Two engines. Parallel. Feeding off the primary ring. the way that works is genuinely so cool π
Because resource descriptors have moved to memory, the CE lets you prime the caches while the DE is updating register state β so that the resource descriptors will already be in cache when the draw is processed. obsessed with this kind of forward-thinking behaviour π β¨
To pull this off, the userspace driver submits two IBs: one for the CE and one for the DE. And if there's a CE IB (which, fun fact, is called a CONST_IB), it will be put on the ring prior to the DE IB. order matters, bestie π«Ά
And prior to SI? There was just a DE IB. simpler times, lowkey π
π SEE ALSO π
go check out the kernel file ./drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c β and while you're in there, the whole friend group:
amdgpu_ib_get(9)amdgpu_ib_free(9)amdgpu_ib_pool_init(9)amdgpu_ib_pool_fini(9)amdgpu_ib_pool_gfp_flags(9)amdgpu_ib_ring_tests(9)
they're all linked, they all slay, go read them π¦π
that's the whole page bestie!! mwah π this one lives in ./drivers/gpu/drm/amd/amdgpu and it's dated October 2026, filed under amdgpu_ib_schedule(9) β go off and schedule those IBs responsibly, ily ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms