alchemy_gpio2_enable_int(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– alchemy_gpio2_enable_int(9) β€” the kernel API manual, bestie edition πŸŽ€

okay so you found the alchemy_gpio2_enable_int(9) page in the Kernel API Manual β€” congrats, this one's a ✨macro✨ and it's lowkey iconic once you get the vibe. sit down, grab a strawberry drink πŸ“, and let's get into it.


✨ NAME ✨

alchemy_gpio2_enable_int β€” turn on a GPIO2 pin's contribution to the shared irq. that's it, that's the whole thing, but the details are where it gets juicy πŸ’…


🌸 SYNOPSIS 🌸

void alchemy_gpio2_enable_int (int gpio2 );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • gpio2 β€” the GPIO2 pin you wanna activate, fr fr. valid range is 200...215 πŸ’–

πŸ‘‘ DESCRIPTION πŸ‘‘

okay so here's the lore 🫢: GPIO208-215 all share one interrupt line going to the INTC. they get and'ed with a per-pin enable bit, and then finally or'ed together to make a single irq request β€” which is genuinely so useful for active-high sources, no cap ⭐

with this function you can enable a pin's individual contribution to that int request. cute, right? BUT β€” and this is the main character energy part β€” like all other GPIO-based interrupts, the INTC also has to be programmed to accept the GPIO208_215 interrupt. it's a two-party situation, you can't just show up alone πŸ™ˆ


πŸ’€ NOTE πŸ’€

  • calling this macro is only necessary for GPIO208-215. every other GPIO2-based interrupt has its own request to the INTC, so they don't need this πŸ’œ
  • please, please consult your Alchemy databook for more information! it's giving required reading πŸ“š
  • on the Au1550, GPIOs 201-205 also have a shared interrupt request line to the INTC, GPIO201_205. this function works for those too β€” slay πŸŽ€
  • (200-215 by default). no sanity checks are made, β€” so yeah, it will not vibe check your input for you. you're on your own there 😭πŸ”₯
bestie warning: no sanity checks means no sanity checks. bad input does not get caught. periodt.

🌈 SEE ALSO 🌈


okay that's the whole page, you ate that πŸ’…βœ¨ source is ./arch/mips/include/asm/mach-a... and it's dated October 2026 β€” signed, sealed, delivered, and filed under alchemy_gpio2_enable_int(9) πŸ§šπŸ’– byeee 🫢

πŸ“¦ where this page comes from