aio_port_set_clk(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… aio_port_set_clk(9) β€” Kernel API Manual, but make it a vibe ✨

okay so bestie, welcome to the group chat for the kernel β€” this is a page straight out of the Kernel API Manual and it's all about setting the clock and divider of an AIO port block. it's giving very "let me fix your timing, queen" energy πŸŽ€


✨ NAME ✨

aio_port_set_clk β€” set clock and divider of AIO port block πŸ•πŸ’«


🌸 SYNOPSIS 🌸

int aio_port_set_clk (struct uniphier_aio_sub *sub );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • sub β€” the AIO substream pointer. literally the little pointer to the substream, she's the main character here πŸ‘‘

🧚 DESCRIPTION 🧚

okay so what this does: it sets a suitable PLL clock divider and the relational settings for the input/output port block of AIO. no cap, it's just getting the vibes aligned so the clock timing actually slays πŸ”₯

the parameters are specified by set_sysclk and set_pll β€” those are the two functions feeding it the deets, iykyk πŸ’…


🌈 RETURN 🌈

  • Zero if successful πŸŽ‰
  • otherwise a negative value on error 😭 β€” so like, if it didn't work, it's negative. periodt.

🫢 SEE ALSO 🫢

the kernel file ./sound/soc/uniphier/aio-core.c is the homegirl for all of this, and here's the whole squad of related functions you should absolutely check out:

like, the whole friend group is here and they're all iconic 🫢✨


this page is brought to you by the ./sound/soc/uniphier source directory, version vibes from October 2026, and the manual section for aio_port_set_clk(9) β€” mwah, go forth and set those clocks, bestie πŸ’–πŸŽ€πŸ¦‹
πŸ“¦ where this page comes from