NCR5380_intr(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… NCR5380_intr β€” like, the generic NCR5380 irq handler, bestie ✨

So this lil page lives in the Kernel API Manual (section 9, for the uninitiated πŸŽ€) and it's all about one function: NCR5380_intr. Buckle up, we're going in.


✨ SYNOPSIS ✨

irqreturn_t NCR5380_intr (int irq , void *dev_id );

🌸 ARGUMENTS 🌸

  • irq β€” the interrupt number, aka which interrupt we're dealing with πŸ‘€
  • dev_id β€” device info, the little passport your device carries around 🫢

πŸ¦‹ DESCRIPTION πŸ¦‹

Okay so the whole job of this function is: handle interrupts, reestablish those I_T_L or I_T_L_Q nexuses from the disconnected queue (iykyk πŸ’…), and restart NCR5380_main as required. That's the vibe.

Here's the messy part though β€” the chip can assert IRQ in any of six different conditions, and then that IRQ flag gets cleared by reading the Reset Parity/Interrupt Register (RPIR). So basically you read the register and the flag goes bye-bye. ✨

Three of these six conditions are latched in the Bus and Status Register:

  • End of DMA β€” cleared by ending DMA Mode 🏁
  • Parity error β€” cleared by reading RPIR
  • Loss of BSY β€” cleared by reading RPIR

Two conditions have flag bits that are not latched:

  • Bus phase mismatch β€” non-maskable in DMA Mode, cleared by ending DMA Mode
  • Bus reset β€” non-maskable

And the remaining condition has, like, no flag bit at all:

  • Selection/reselection πŸ™ˆ

So yeah β€” establishing the cause(s) of any interrupt is partly guesswork. Fr fr. Not me being dramatic, that's just the situation.

In "The DP8490 and DP5380 Comparison Guide", National Semiconductor claimed that "the design of the [DP8490] interrupt logic ensures interrupts will not be lost (they can be on the DP5380)." The L5380/53C80 datasheet from LOGIC Devices has more details, if you're obsessed and wanna go deeper πŸ”₯

Okay and some real talk about what's not worth doing:

  • Checking for bus reset by reading RST is futile because of interrupt latency β€” like, don't even try it bestie 😭 β€” but a bus reset will reset chip logic.
  • Checking for parity error is unnecessary because that interrupt is never enabled. Periodt.
  • A Loss of BSY condition will clear DMA Mode.

We can tell when that Loss of BSY thing occurs because the Busy Monitor interrupt is enabled together with DMA Mode. Slay, that's our little tell. πŸ‘‘


🌈 SEE ALSO 🌈

Kernel file ./drivers/scsi/NCR5380.c, plus the whole friend group:

initialize_SCp(9), NCR5380_poll_politely2(9), NCR5380_print(9), NCR5380_print_phase(9), NCR5380_info(9), NCR5380_init(9), NCR5380_maybe_reset_bus(9), NCR5380_exit(9), complete_cmd(9), NCR5380_queue_command(9), dequeue_next_cmd(9), NCR5380_main(9), NCR5380_select(9), NCR5380_transfer_pio(9), do_reset(9), do_abort(9), list_find_cmd(9), NCR5380_abort(9), NCR5380_host_reset(9)


And that's the tea β˜• β€” this page comes from ./drivers/scsi, dated October 2026, and it's literally called NCR5380_intr(9). Go read it, bestie, you've got this πŸ’–πŸ§šβ­

πŸ“¦ where this page comes from