GPUVM(9)
π GPUVM π
okay so this is the Kernel API Manual entry for GPUVM, and bestie, it's giving memory-management main character energy β¨
πΈ GPUVM πΈ
So. GPUVM is the MMU functionality that lives on the GPU. Think of it as the GPU's very own address-translation situation π
It's similar to the legacy GART on older asics, however β and this is the glow-up β instead of there being a single global GART table for the entire GPU, there can be multiple GPUVM page tables active at any given time. Multiple. Simultaneously. Iconic.
GPUVM page tables can contain a mix of VRAM pages and system pages (both memory and MMIO), and system pages can be mapped as:
- snooped (cached system pages)
- unsnooped (uncached system pages)
π₯ the whole VMID situation π₯
Each active GPUVM has an ID associated with it, and there's a page table linked with each VMID. When executing a command buffer, the kernel tells the engine what VMID to use for that command buffer. VMIDs are allocated dynamically as commands are submitted π«Ά
The userspace drivers maintain their own address space, and the kernel sets up their page tables accordingly when they submit their command buffers and a VMID is assigned. No cap.
β οΈ The hardware supports up to 16 active GPUVMs at any given time. That's the limit, bestie. Sixteen. Don't come crying to me at seventeen π
π¦ page table anatomy π¦
Each GPUVM is represented by a 1-2 or 1-5 level page table, depending on the ASIC family. (Yes, the exact numbers matter, write them down π)
GPUVM also supports RWX attributes on each page, plus other features such as encryption and caching attributes. Fancy π
π VMID 0 is special π
Okay this is the part you cannot skip.
VMID 0 is the GPUVM used for the kernel driver. In addition to an aperture managed by a page table, VMID 0 also has several other apertures:
- there's an aperture for direct access to VRAM
- there's a legacy AGP aperture which just forwards accesses directly to the matching system physical addresses (or IOVAs when an IOMMU is present)
These apertures provide direct access to these memories without incurring the overhead of a page table β literally the shortcut route, no middleman β¨
VMID 0 is used by the kernel driver for tasks like memory management.
π who actually uses this π
GPU clients (i.e., engines on the GPU) use GPUVM VMIDs to access memory.
For user applications, each application can have their own unique GPUVM address space. The application manages the address space, and the kernel driver manages the GPUVM page tables for each process.
π And if a GPU client accesses an invalid page? It generates a GPU page fault β similar to accessing an invalid page on a CPU. Same energy, different hardware. You've been warned.
β¨ SEE ALSO β¨
Kernel file ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c struct:
amdgpu_prt_cb(9)struct amdgpu_vm_tlb_seq_struct(9)amdgpu_vm_assert_locked(9)amdgpu_vm_is_bo_always_valid(9)amdgpu_vm_bo_evicted(9)amdgpu_vm_bo_needs_update(9)amdgpu_vm_bo_idle(9)amdgpu_vm_bo_reset_state_machine(9)amdgpu_vm_update_shared(9)amdgpu_vm_bo_update_shared(9)amdgpu_vm_update_stats_locked(9)amdgpu_vm_update_stats(9)amdgpu_vm_bo_base_init(9)amdgpu_vm_lock_pd(9)amdgpu_vm_lock_individual(9)amdgpu_vm_move_to_lru_tail(9)amdgpu_vm_generation(9)amdgpu_vm_validate(9)amdgpu_vm_ready(9)amdgpu_vm_check_compute_bug(9)amdgpu_vm_need_pipeline_sync(9)amdgpu_vm_flush(9)amdgpu_vm_bo_find(9)amdgpu_vm_map_gart(9)amdgpu_vm_update_pdes(9)amdgpu_vm_tlb_seq_cb(9)amdgpu_vm_tlb_flush(9)amdgpu_vm_update_range(9)amdgpu_vm_bo_update(9)amdgpu_vm_update_prt_state(9)amdgpu_vm_prt_get(9)amdgpu_vm_prt_put(9)amdgpu_vm_prt_cb(9)amdgpu_vm_add_prt_cb(9)amdgpu_vm_free_mapping(9)amdgpu_vm_prt_fini(9)amdgpu_vm_clear_freed(9)amdgpu_vm_handle_moved(9)amdgpu_vm_flush_compute_tlb(9)amdgpu_vm_bo_add(9)amdgpu_vm_bo_insert_map(9)amdgpu_vm_bo_map(9)amdgpu_vm_bo_replace_map(9)amdgpu_vm_bo_unmap(9)amdgpu_vm_bo_clear_mappings(9)amdgpu_vm_bo_lookup_mapping(9)amdgpu_vm_bo_trace_cs(9)amdgpu_vm_bo_del(9)amdgpu_vm_evictable(9)amdgpu_vm_bo_invalidate(9)amdgpu_vm_bo_move(9)amdgpu_vm_get_block_size(9)amdgpu_vm_adjust_size(9)amdgpu_vm_wait_idle(9)amdgpu_vm_put_task_info(9)amdgpu_vm_get_task_info_vm(9)amdgpu_vm_get_task_info_pasid(9)amdgpu_vm_set_task_info(9)amdgpu_vm_init(9)amdgpu_vm_make_compute(9)amdgpu_vm_fini(9)amdgpu_vm_manager_init(9)amdgpu_vm_manager_fini(9)amdgpu_vm_ioctl(9)amdgpu_vm_lock_by_pasid(9)amdgpu_vm_handle_fault(9)amdgpu_debugfs_vm_bo_info(9)amdgpu_vm_update_fault_cache(9)
and that's the whole thing, bestie π you ate that. go forth and translate addresses responsibly π
mwah π β this one comes to you from ./drivers/gpu/drm/amd/amdgpu, dated October 2026, filed under GPUVM(9). bookmark it, screenshot it, tattoo it idk π¦
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms