RDTSET(8)

💖 RDTSET(8) — the rdtset girlies' guide 💖

okay bestie, buckle up, this is rdtset from section 8 of the System Manager's Manual, and she is that girl. CPU affinity + Intel(R) RDT + AMD PQoS control. no cap. 🎀

---

🌸 NAME 🌸

rtdset — task CPU affinity and Intel(R) Resource Director Technology/AMD PQoS control tool 💅

wait. hold on. it's rdtset. not rtdset. i literally just did that. ignore me. it's rdtset. periodt. 😭

---

✨ SYNOPSIS ✨

rdtset -t <feature=value;...cpu=cpulist>... -c <cpulist> [-I] (-p
<pidlist> | [-k] cmd [<args>...])
rdtset -r <cpulist> -t <feature=value;...cpu=cpulist>... -c <cpulist>
[-I] (-p <pidlist> | [-k] cmd [<args>...])
rdtset -r <cpulist> -c <cpulist> (-p <pidlist> | [-k] cmd [<args>...])
rdtset -r <cpulist> -t <feature=value;...cpu=cpulist>... [-I] -p
<pidlist>
rdtset -t <feature=value> -I [-c <cpulist>] (-p <pidlist> | [-k] cmd
[<args>...])

like. five whole ways to call her. she's flexible, she contains multitudes. 🦋

---

💜 DESCRIPTION 💜

so if you want the deep lore on Intel(R) Resource Director Technology, the sources are:

http://www.intel.com/content/www/us/en/architecture-and-technology/resource-director-technology.html

or

https://github.com/intel/intel-cmt-cat/wiki

go read them. they're giving encyclopedia. i respect it. 📚

okay so what does rdtset actually do. she provides support to set up the CAT (Cache Allocation Technology), MBA (Memory Bandwidth Allocation) and SMBA (Slow Memory Bandwidth Allocation) capabilities for a task — and also sets its CPU affinity. three icons in one command, we love a multitasker. 👑

for MBA, rdtset offers two modes of operation: a fixed MBA rate, or a closed-loop one that monitors local memory B/W usage and adjusts MBA accordingly. pick your fighter.

for the OS interface, she uses MBA CTRL via libpqos — and OS support for that is available in Linux kernel 4.18 or later, so check your kernel bestie. for MSRs, the tool adjusts MBA configuration by itself based on local memory B/W. Intel(R) RDT/AMD PQoS allocation operations of the utility are done via the libpqos library.

Class of service 0 (CLOS0) is assumed as the default one. default queen behavior honestly.

in command mode, rdtset forks and one process executes the command. another process waits for the task to terminate and restores the default allocation state by assigning cpu's back to CLOS0. so she cleans up after herself, which is more than some people do. 😌

⚠️ this behavior is not in place in PID mode. noted. don't come for me later.

---

🎀 OPTIONS 🎀

rdtset options are as follow:

• -h, --help — show help. the classic. she's here for you. 🫶
• -v, --verbose — verbose mode. she will tell you everything. oversharing era. 💬
• -I, --iface-os — set the library to use the kernel implementation. if not set, the default implementation is to detect the interface automatically (MSR or kernel).
• -F <interface>, --iface <interface> — set the library interface to automatically detected one ('auto'), MSR ('msr') or kernel interface ('os'). <interface> can be set to either 'auto' (default), 'msr' or 'os'. If automatic detection is selected ('auto'), it:
  1. Takes RDT_IFACE environment variable into account if this variable is set
  2. Selects OS interface if the kernel interface is supported
  3. Selects MSR interface otherwise
• -t --rdt feature=value;...cpu=cpulist — specify Intel(R) RDT configuration, single class configuration per -t, multiple -t options allowed. Accepted values for features:
  • 2, l2 for level 2 cache
  • 3, l3 for level 3 cache
  • m, mba for MBA
  • s, smba for SMBA
  • b, mba_max for max allowable local memory bandwidth

For example:

-t 'l3=0xf;cpu=1'

CPU 1 uses four L3 cache-ways (mask 0xf)

-t 'l3=0xf;cpu=2' -t 'l3=0xf0;cpu=3,4,5'

CPU 2 uses four L3 cache-ways (mask 0xf), CPUs 3-5 share four L3 cache-ways (mask 0xf0), L3 cache-ways used by CPU 2 and 3-5 are non-overlapping

-t 'l3=0xf;cpu=0-2' -t 'l3=0xf0;cpu=3,4,5'

CPUs 0-2 share four L3 cache-ways (mask 0xf), CPUs 3-5 share four L3 cache-ways (mask 0xf0), L3 cache-ways used by CPUs 0-2 and 3-5 are non-overlapping

-t 'l3=0xf,0xf0;cpu=1'

On CDP enabled system, CPU 1 uses four cache-ways for code (mask 0xf) and four cache-ways for data (mask 0xf0), data and code cache-ways are non-overlapping

-t 'mba=70;cpu=0-2'

CPUs 0-2 can utilize up to 70% of available memory bandwidth

-t 'smba=64;cpu=0-2'

CPUs 0-2 can utilize up to 64 units of available slow memory bandwidth

-t 'mba=50;l3=0xf;cpu=1'

CPU 1 uses four L3 (mask 0xf) cache-ways and can utilize up to 50% of available memory bandwidth

-t 'mba_max=2000;cpu=1-2'

Use SW controller to limit local memory B/W on cores 1-2 to 2000MBps (SW controller uses MBL monitoring and adjust MBA rate).

Example PID type allocation configuration (requires -I option):

-t 'l3=0xf'

Allocate four L3 (mask 0xf) cache-ways to specified PIDs (-p option) or command

-t 'l3=0xf;cpu=1;l3=0x1'

CPU 1 uses four L3 (mask 0xf) cache-ways Specified PIDs (-p option) or command uses one L3 (mask 0x1) cache-way

• -c <cpulist>, --cpu <cpulist> — specify CPU affinity configuration, a numerical list of processors. the numbers are separated by commas and may include ranges. for example: 1-3,4,5. 🧮
• -p <pidlist>, --pid <pidlist> — operate on existing PIDs. yes, plural. she can hold several at once. 💅
• -r <cpulist>, --reset <cpulist> — reset allocation for CPUs (assign COS#0 to listed CPUs). For example:

-r 0-5

Reset allocation for CPUs 0-5

-r 0-5 -t 'l3=0xf0;cpu=0-5' -c 0-5 -p $BASHPID

Reconfigure allocation for CPUs 0-5 In order to reconfigure allocation, it is needed to reset current configuration

• -k, --sudokeep — do not drop sudo elevated privileges. she keeps the power. 👑

---

🦋 NOTES 🦋

if the kernel interface is not selected — neither manually (e.g. --iface=msr) nor automatically — then CAT and MBA are configured using Model Specific Registers (MSRs) to set up the class of service masks and manage the association of the cores/logical threads to a class of service.

the rdtset software executes in user space, and access to the MSRs is obtained through a standard Linux*/FreeBSD* interface. under Linux, the virtual file system structure /dev/cpu/CPUNUM/msr provides an interface to read and write the MSRs; under FreeBSD it is /dev/cpuctlCPUNUM. the msr/cpuctl file interface is protected and requires root privileges. 🔐

⚠️ the msr/cpuctl driver might not be auto-loaded, and on some modular kernels the driver may need to be loaded manually:

Under Linux:

sudo modprobe msr

Under FreeBSD:

sudo kldload cpuctl

Interface enforcement:

If you require system wide interface enforcement you can do so by setting the "RDT_IFACE" environment variable. 🫡

🌈 OS interface (--iface-os, -I)

With --iface-os (-I) parameter, rdtset uses resctrl filesystem (/sys/fs/resctrl) instead of accessing MSRs directly. it's giving "we don't do manual labor here." ✨

---

💫 SEE ALSO 💫

• msr(4)

---

👑 AUTHOR 👑

rdtset was written by Wojciech Andralojc <wojciechx.andralojc@intel.com>, Tomasz Kantecki <tomasz.kantecki@intel.com>, Michal Aleksinski <michalx.aleksinski@intel.com>, Marcel Cornu <marcel.d.cornu@intel.com>

absolute legends, every single one. 🫶

This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

💀 read that again bestie. no warranty. not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. she said what she said.

---

and that's the whole page, fr fr. this beauty is from the System Manager's Manual, and she was last updated January 10, 2019. still iconic. still serving. mwah. 💋🎀💖