FLASHPROG(8)
β¨ NAME β¨
flashprog β detect, read, write, verify and erase flash chips π¦
Okay bestie, this is the FLASHPROG(8) manual page, dated 2026-07-17. Periodt. π
πΈ SYNOPSIS πΈ
Flashprog supports multiple command modes:
flashprog ([prog]|config|cfg|write-protect|wp)
With prog being the default and described in this manual. For the other
commands, see flashprog-config(8), and flashprog-write-protect(8).
flashprog [-h|-R|-L|-z|
-p <programmername>[:<parameters>] [-c <chipname>]
(--flash-name|--flash-size|
[-E|-r <file>|-w <file>|-v <file>]
[(-l <file>|--ifd|--fmap|--fmap-file <file>)
[-i <include>]...]
[-n] [-N] [-f])]
[-V[V[V]]] [-o <logfile>] [--progress]
π DESCRIPTION π
flashprog is your go-to utility for detecting, reading, writing, verifying and erasing flash chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system using a supported mainboard. But it's also not just that β it supports various external PCI/USB/parallel-port/serial-port based devices which can program flash chips, including some network cards (NICs), SATA/IDE controller cards, graphics cards, the Bus Pirate device, various FTDI FT2232/FT4232H/FT232H based USB devices, and more. β¨
It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40, TSOP48, and BGA chips, which use various protocols such as LPC, FWH, parallel flash, or SPI. π
π OPTIONS π
Okay so you can pick one of -h, -R, -L, -z, -E, -r, -w, -v or literally no operation. If no operation is specified, flashprog will only probe for flash chips. First-time vibe check: if you try flashprog the first time on a system, run it in probe-only mode and check the output. Also you are advised to make a backup of your current ROM contents with -r before you try to write a new image. All operations involving any chip access (probe/read/write/...) require the -p/--programmer option to be used (please see below). π
-r,--read <file>β Read flash ROM contents and save them into the given<file>. If the file already exists, it will be overwritten. πΎ-w,--write (<file>|-)β Write<file>into flash ROM. If-is provided instead, contents will be read from stdin. This will first automatically erase the chip, then write to it.
In the process the chip is also read several times. First an in-memory backup is made for disaster recovery and to be able to skip regions that are already equal to the image file. This copy is updated along with the write operation. In case of erase errors it is even re-read completely. After writing has finished and if verification is enabled, the whole flash chip is read out and compared with the input image. π₯
-n,--noverifyβ Skip the automatic verification of flash ROM contents after writing. Using this option is not recommended, you should only use it if you know what you are doing and if you feel that the time for verification takes too long.
Typical usage is: flashprog -p prog -n -w <file>
This option is only useful in combination with --write. π
-N,--noverify-allβ Skip not included regions during automatic verification after writing (cf.-land-i). You should only use this option if you are sure that communication with the flash chip is reliable (e.g. when using the internal programmer). Even if flashprog is instructed not to touch parts of the flash chip, their contents could be damaged (e.g. due to misunderstood erase commands).
This option is required to flash an Intel system with locked ME flash region using the internal programmer. It may be enabled by default in this case in the future. π
-v,--verify (<file>|-)β Verify the flash ROM contents against the given<file>. If-is provided instead, contents will be read from stdin. π«Ά-E,--eraseβ Erase the flash ROM chip. π§Ή-V,--verboseβ More verbose output. This option can be supplied multiple times (max. 3 times, i.e.-VVV) for even more debug output. π-c,--chip <chipname>β Probe only for the specified flash ROM chip. This option takes the chip name as printed byflashprog -Lwithout the vendor name as parameter. Please note that the chip name is case sensitive. π-f,--forceβ Force one or more of the following actions:- Force chip read and pretend the chip is there.
- Force chip access even if the chip is bigger than the maximum supported size for the flash bus.
- Force erase even if erase is known bad.
- Force write even if write is known bad. β οΈ
-l,--layout <file>β Read ROM layout from<file>.
flashprog supports ROM layouts. This allows you to flash certain parts of the flash chip only. A ROM layout file contains multiple lines with the following syntax:
startaddr:endaddr imagename
startaddr and endaddr are hexadecimal addresses within the ROM file and do not refer to any physical address. Please note that using a 0x prefix for those hexadecimal numbers is not necessary, but you can't specify decimal/octal numbers. imagename is an arbitrary name for the region/image from startaddr to endaddr (both addresses included).
Example:
00000000:00008fff gfxrom
00009000:0003ffff normal
00040000:0007ffff fallback
If you only want to update the image named normal in a ROM based on the layout above, run
flashprog -p prog --layout rom.layout --image normal -w some.rom
To update only the images named normal and fallback, run:
flashprog -p prog -l rom.layout -i normal -i fallback -w some.rom
Overlapping sections are not supported. π«
--fmapβ Read layout from fmap in flash chip.
flashprog supports the fmap binary format which is commonly used by coreboot for partitioning a flash chip. The on-chip fmap will be read and used to generate the layout.
If you only want to update the COREBOOT region defined in the fmap, run
flashprog -p prog --fmap --image COREBOOT -w some.rom
πΈ
--fmap-file <file>β Read layout from a<file>containing binary fmap (e.g. coreboot roms).
flashprog supports the fmap binary format which is commonly used by coreboot for partitioning a flash chip. The fmap in the specified file will be read and used to generate the layout.
If you only want to update the COREBOOT region defined in the binary fmap file, run
flashprog -p prog --fmap-file some.rom --image COREBOOT -w some.rom
π¦
--ifdβ Read ROM layout from Intel Firmware Descriptor.
flashprog supports ROM layouts given by an Intel Firmware Descriptor (IFD). The on-chip descriptor will be read and used to generate the layout. If you need to change the layout, you have to update the IFD only first.
The following ROM images may be present in an IFD:
fdβ the IFD itselfbiosβ the host firmware aka. BIOSmeβ Intel Management Engine firmwaregbeβ gigabit ethernet firmwarepdβ platform specific data
π
-i,--image <imagename>β Only flash region/image<imagename>from flash layout. π―--flash-nameβ Prints out the detected flash chips name. π--flash-sizeβ Prints out the detected flash chips size. π--flash-contents <ref-file>β The file contents of<ref-file>will be used to decide which parts of the flash need to be written. Providing this saves an initial read of the full flash chip. Be careful, if the provided data doesn't actually match the flash contents, results are undefined. β οΈ-L,--list-supportedβ List the flash chips, chipsets, mainboards, and external programmers (including PCI, USB, parallel port, and serial port based devices) supported by flashprog.
There are many unlisted boards which will work out of the box, without special support in flashprog. Please let us know if you can verify that other boards work or do not work out of the box.
IMPORTANT: For verification you have to test an ERASE and/or WRITE operation, so make sure you only do that if you have proper means to recover from failure! π
-z,--list-supported-wikiβ Same as--list-supported, but outputs the supported hardware in MediaWiki syntax, so that it can be easily pasted into the supported hardware wiki page (https://flashprog.org/Supported_hardware). Please note that MediaWiki output is not compiled in by default. π-p,--programmer <name>[:parameter[,parameter[,parameter]]]β Specify the programmer device. This is mandatory for all operations involving any chip access (probe/read/write/...). Currently supported are:internal(for in-system flashing in the mainboard)dummy(virtual programmer for testing flashprog)nic3com(for flash ROMs on 3COM network cards)nicrealtek(for flash ROMs on Realtek and SMC 1211 network cards)nicnatsemi(for flash ROMs on National Semiconductor DP838* network cards)nicintel(for parallel flash ROMs on Intel 10/100Mbit network cards)nicamd(for parallel flash ROMs on AMD PCnet network cards)gfxmatrox(for flash ROMs on Matrox graphics cards)gfxnvidia(for flash ROMs on NVIDIA graphics cards)drkaiser(for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)satasii(for flash ROMs on Silicon Image SATA/IDE controllers)scsilsi(for flash ROMs on LSI SCSI controllers)satamv(for flash ROMs on Marvell SATA controllers)atahpt(for flash ROMs on Highpoint ATA/RAID controllers)atavia(for flash ROMs on VIA VT6421A SATA controllers)atapromise(for flash ROMs on Promise PDC2026x ATA/RAID controllers)it8212(for flash ROMs on ITE IT8212F ATA/RAID controller)ft2232_spi(for SPI flash ROMs attached to an FT2232/FT4232H/FT232H family based USB SPI programmer).ft4222_spi(for SPI and QPI flash ROMs attached to an FT4222H based USB programmer).serprog(for flash ROMs attached to a programmer speaking serprog, including some Arduino-based devices).buspirate_spi(for SPI flash ROMs attached to a Bus Pirate)
dediprogβ for SPI flash ROMs attached to a Dediprog SF100/SF200/SF600/SF700rayer_spiβ for SPI flash ROMs attached to a parallel port by one of various cable typespony_spiβ for SPI flash ROMs attached to a SI-Prog serial port bitbanging adapternicintel_spiβ for SPI flash ROMs on Intel Gigabit network cardsogp_spiβ for SPI flash ROMs on Open Graphics Project graphics cardlinux_gpio_spiβ for SPI flash ROMs attached to a GPIO chip device accessible via/dev/gpiochipXon Linuxlinux_mtdβ for SPI flash ROMs accessible via/dev/mtdXon Linuxlinux_spiβ for SPI flash ROMs accessible via/dev/spidevX.Yon Linuxusbblaster_spiβ for SPI flash ROMs attached to an Altera USB-Blaster compatible cablenicintel_eepromβ for SPI EEPROMs on Intel Gigabit network cardsmstarddc_spiβ for SPI flash ROMs accessible through DDC in MSTAR-equipped displayspickit2_spiβ for SPI flash ROMs accessible via Microchip PICkit2ch341a_spiβ for SPI flash ROMs attached to WCH CH341Ach347_spiβ for SPI flash ROMs attached to WCH CH347digilent_spiβ for SPI flash ROMs attached to iCEblink40 development boardsjlink_spiβ for SPI flash ROMs attached to SEGGER J-Link and compatible devicesni845x_spiβ for SPI flash ROMs attached to National Instruments USB-8451 or USB-8452stlinkv3_spiβ for SPI flash ROMs attached to STMicroelectronics STLINK V3 devicesdirtyjtag_spiβ for SPI flash ROMs attached to DirtyJTAG-compatible devices
okay so some of these programmers have parameters, and they can be optional or straight-up mandatory β the whole tea is spilled in the PROGRAMMER-SPECIFIC INFORMATION section below. also, support for some of them can just be compiled out entirely, which is its own vibe. flashprog -h will list every programmer that actually made it into your build. π
-h,--helpβ shows you a help text and then dips. βοΈ-o,--output <logfile>β saves the full debug log to <logfile>. if that file already exists, bestie, it gets overwritten, no questions asked. this is the recommended way to gather logs from flashprog, because the logs are gonna be verbose even when the on-screen messages are out here being quiet, and you don't have to mess with output redirection. π«Ά--progressβ shows you the progress percentage of operations on the standard output.-R,--versionβ shows version information and exits.
π§ PROGRAMMER-SPECIFIC INFORMATION β¨
some programmer drivers take further parameters to set programmer-specific stuff. these parameters get separated from the programmer name by a colon. some programmers want their arguments at fixed positions, and others use a key/value situation where the key and the value are separated by an equal sign, and different pairs are separated by a comma or a colon. choose wisely. π
π internal programmer
πΈ Board Enables
so, some mainboards need mainboard-specific code to be run in order to enable flash erase and write support β and also probe support on those old-school systems with parallel flash. the mainboard brand and model (if it needs specific code) is usually autodetected using one of these mechanisms:
- if your system is running coreboot, the mainboard type is determined from the coreboot table.
- otherwise, the mainboard is detected by examining the onboard PCI devices and possibly DMI info.
if PCI and DMI don't contain enough info to uniquely identify the mainboard (which is the exception, not the rule) β or if you just want to override the detected mainboard model β you can specify the mainboard using this syntax:
flashprog -p internal:mainboard=<vendor>:<board>
check out the 'Known boards' or 'Known laptops' section in the output of flashprog -L for a list of boards that need you to specify the board name, in case no coreboot table is found.
ngl, some of these board-specific flash enabling functions (they're called board enables) in flashprog have not yet been tested. π if your mainboard gets detected as needing an untested board enable function, flashprog prints a warning message and the board enable does not get executed β because a wrong board enable function might make your system behave all sorts of erratic, since these functions touch the low-level internals of a mainboard. and not executing a board enable function (if one is actually needed) might cause detection or erasing failure. if your board only protects part of the flash (commonly the top end, called the boot block), flashprog might not hit an error until after it's already erased the unprotected part β so running without the board-enable function might be dangerous for erase and write (and write includes erase, fyi).
the suggested procedure for a mainboard with untested board specific code is:
- first, try to probe the ROM β just invoke flashprog and check that it detects your flash chip type β without running the board enable code (i.e. with no parameters at all).
- if it finds your chip? slay. we're done here. π if not, retry probing your chip with the board-enable code running, using:
flashprog -p internal:boardenable=force
- if your chip is still not detected, the board enable code seems to be broken, or the flash chip is unsupported. otherwise, make a backup of your current ROM contents (using
-r) and store it somewhere outside of your computer β like a USB drive or a network share. if you already had to run the board enable code just to probe, use it for reading too. - if reading succeeds and the contents of the read file look legit, you can try to write the new image. you should enable the board enable code in any case now, because it was written precisely because it's known that writing/erasing without the board enable is going to fail.
in any case β success or failure β please report to the flashprog mailing list, see below. π«Ά
π Coreboot
on systems running coreboot, flashprog checks whether the image you want actually matches your mainboard. this needs some special board ID to be present in the image. if flashprog detects that the image you want to write and the current board do not match, it will refuse to write the image unless you specify:
flashprog -p internal:boardmismatch=force
π¦ ITE IT87 Super I/O
if your mainboard is manufactured by GIGABYTE and supports DualBIOS, it's very likely it uses an ITE IT87 series Super I/O to switch between the two flash chips. only one of them can be accessed at a time, and you can manually pick which one to use with this syntax:
flashprog -p internal:dualbiosindex=chip
where chip is the index of the chip to use (0 = main, 1 = backup). you can check which one is currently selected by just leaving out the chip parameter. β¨
if your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus translation, flashprog should autodetect that config. but if you want to set the I/O base port of the IT87 series SPI controller manually instead of using the value the BIOS handed over, use:
flashprog -p internal:it87spiport=portnum
where portnum is the I/O port number (it must be a multiple of 8). in the unlikely case flashprog doesn't detect an active IT87 LPC<->SPI bridge, please send a bug report so we can diagnose the problem. π
π AMD chipsets
okay this one's important. starting with the SB700 chipset, there's an integrated microcontroller (IMC) based on the 8051 embedded in every AMD southbridge. its firmware lives in the same flash chip as the host's β which makes writing to the flash risky if the IMC is active. flashprog tries to temporarily disable the IMC, but even then, changing the contents of the flash can have unwanted effects: when the IMC continues (at the latest after a reboot) it will keep executing code from the flash. if that code was removed or changed in an unfortunate way, it is unpredictable what the IMC will do. π
therefore, if flashprog detects an active IMC it will disable write support unless the user forces it with:
flashprog -p internal:amd_imc_force=yes
the user is responsible for supplying a suitable image, or for leaving out the IMC region with the help of a layout file. this limitation might be removed in the future once we understand the details better and have received enough feedback from users. please report the outcome if you had to use this option to write a chip. π«Ά
an optional spispeed parameter specifies the frequency of the SPI bus where applicable (i.e. SB600 or later with an SPI flash chip directly attached to the chipset). syntax is:
flashprog -p internal:spispeed=frequency
where frequency can be '16.5 MHz', '22 MHz', '33 MHz', '66 MHz', '100 MHZ', or '800 kHz'. support for individual frequencies depends on the generation of the chipset:
- SB6xx, SB7xx, SP5xxx: from 16.5 MHz up to and including 33 MHz
- SB8xx, SB9xx, Hudson: from 16.5 MHz up to and including 66 MHz
- Yangtze (with SPI 100 engine as found in Kabini and Tamesh): all of them
the default is to use 16.5 MHz and disable Fast Reads.
β Intel chipsets
if you have an Intel chipset with an ICH8 or later southbridge with SPI flash attached, and if a valid descriptor was written to it (e.g. by the vendor), the chipset provides an alternative way to access the flash chip(s) named Hardware Sequencing. it's much simpler than the normal access method (called Software Sequencing), but it does not allow the software to choose which SPI commands get sent. you can use:
flashprog -p internal:ich_spi_mode=value
where value can be auto, swseq or hwseq. by default (or when setting ich_spi_mode=auto) the module tries to use swseq and only activates hwseq if need be (e.g. if important opcodes are inaccessible due to lockdown, or if more than one flash chip is attached). the other options (swseq, hwseq) select the respective mode, if possible. π
okay so ALSO, ICH8 and later southbridges might have locked address ranges of different kinds too, bestie β but only if a valid descriptor got written to them. When that happens, the flash address space gets partitioned into a bunch of so-called "Flash Regions" π« that hold the host firmware, the ME firmware, and so on respectively. And the flash descriptor can also specify up to 5 so-called "Protected Regions", which are freely chosen address ranges that are totally independent from those "Flash Regions" we just talked about. Every single one of them can be write and/or read protected individually. iconic protection energy, honestly π
If you've got an Intel chipset with an ICH2 or later southbridge, and you want to set specific IDSEL values for a non-default flash chip or an embedded controller (EC), you can use this syntax:
flashprog -p internal:fwh_idsel=value
where value is the 48-bit hexadecimal raw value that gets written into the IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff. The rightmost hex digit corresponds with the lowest address range. Every address range has a corresponding sister range 4 MB below it with identical IDSEL settings π«Ά. The default value for ICH7 is shown in the example below.
Example: flashprog -p internal:fwh_idsel=0x001122334567
π» Laptops
Using flashprog on older laptops that don't boot from the SPI bus is dangerous and may easily make your hardware unusable (also peep the BUGS section, bestie π). The embedded controller (EC) in some machines may interact badly with flashing. More info lives in the wiki β¨https://flashprog.org/Laptopsβ©.
Problems pop off when the flash chip is shared between BIOS and EC firmware, and the EC does not expect flashprog to be touching that chip at all π. While flashprog is trying to change the contents of that memory, the EC might need to fetch new instructions or data from it and could stop working correctly. Probing for and reading from the chip may also irritate your EC and cause fan failure, backlight failure, sudden poweroff, and other nasty effects π.
flashprog will attempt to detect if it's running on such a laptop and limit probing to SPI buses. If you want to probe the LPC bus anyway (at your own risk, babe), use:
flashprog -p internal:laptop=force_I_want_a_brick
We will not help you if you force flashing on a laptop, because this is a really dumb idea. You have been warned. β οΈ
Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect laptops. Some vendors did not implement those bits correctly or set them to generic and/or dummy values π. flashprog will then issue a warning and restrict buses like above. In this case you can use:
flashprog -p internal:laptop=this_is_not_a_laptop
to tell flashprog (at your own risk) that it is not running on a laptop.
π§ͺ dummy programmer
The dummy programmer operates on a buffer in memory only. No hardware, no drama π. It's a safe and fast way to test all sorts of aspects of flashprog, and it's mainly used in development and while debugging. It's able to emulate some chips to a certain degree (basic identify/read/erase/write operations work).
An optional parameter specifies the bus types it should support. For that you have to use the:
flashprog -p dummy:bus=[type[+type[+type]]]
syntax where type can be parallel, lpc, fwh, spi in any order. If you specify bus without type, all buses will be disabled π. If you do not specify bus at all, all buses will be enabled.
Example: flashprog -p dummy:bus=lpc+fwh
The dummy programmer supports flash chip emulation for automated self-tests without hardware access. If you want to emulate a flash chip, use the:
flashprog -p dummy:emulate=chip
syntax where chip is one of the following chips (pls specify only the chip name, not the vendor π₯Ί):
- ST
M25P10-ASPI flash chip (128 kB, RDID, page write) - ST
M25P10.RESSPI flash chip (128 kB, RES, page write) - SST
SST25VF040.REMSSPI flash chip (512 kB, REMS, byte write) - SST
SST25VF032BSPI flash chip (4096 kB, RDID, AAI write) - Macronix
MX25L6436SPI flash chip (8192 kB, RDID, SFDP) - Winbond
W25Q128FVSPI flash chip (16384 kB, RDID) - Spansion
S25FL128LSPI flash chip (16384 kB, RDID)
Example: flashprog -p dummy:emulate=SST25VF040.REMS
β¨ Persistent images
If you use flash chip emulation, flash image persistence is available as well π by using the:
flashprog -p dummy:emulate=chip,image=image.rom
syntax where image.rom is the file where the simulated chip contents are read on flashprog startup and where the chip contents on flashprog shutdown are written to.
Example: flashprog -p dummy:emulate=M25P10.RES,image=dummy.bin
β¨ SPI write chunk size
If you use SPI flash chip emulation for a chip that supports SPI page write with the default opcode, you can set the maximum allowed write chunk size with the:
flashprog -p dummy:emulate=chip,spi_write_256_chunksize=size
syntax where size is the number of bytes (min. 1, max. 256).
Example:
flashprog -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5
β¨ SPI blacklist
To simulate a programmer that refuses to send certain SPI commands to the flash chip, you can specify a blacklist of SPI commands with the:
flashprog -p dummy:spi_blacklist=commandlist
syntax where commandlist is a list of two-digit hexadecimal representations of SPI commands. If commandlist is e.g. 0302, flashprog will behave as if the SPI controller refuses to run command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashprog will detect an error during command execution π€.
β¨ SPI ignorelist
To simulate a flash chip that ignores (doesn't support) certain SPI commands, you can specify an ignorelist of SPI commands with the:
flashprog -p dummy:spi_ignorelist=commandlist
syntax where commandlist is a list of two-digit hexadecimal representations of SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashprog won't detect an error during command execution π.
β¨ SPI status register
You can specify the initial content of the chip's status register with the:
flashprog -p dummy:spi_status=content
syntax where content is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to SR1, 0x22 to SR2 and 0x33 to SR3. A shorter value is padded to 24 bits with zeroes on the left. Peep the datasheet for whichever chip you chose for details about the registers' content π.
β¨ Write protection
Chips with emulated WP: W25Q128FV, S25FL128L.
You can simulate the state of the hardware protection pin (WP) with the:
flashprog -p dummy:hwwp=state
syntax where state is "yes" or "no" (the default value). "yes" means the active state of the pin implies that the chip is write-protected (on real hardware the pin is usually negated, but not here π
).
π nic3com, nicrealtek, nicnatsemi, nicintel, nicintel_eeprom, nicintel_spi, nicamd, gfxmatrox, gfxnvidia, ogp_spi, drkaiser, satasii, scsilsi, satamv, atahpt, atavia , atapromise and it8212 programmers
These programmers have an option to specify the PCI address of the card you want to use. You must specify it if more than one card supported by the selected programmer is installed in your system π. The syntax is:
flashprog -p xxxx:pci=bb:dd.f,
where xxxx is the name of the programmer, bb is the PCI bus number, dd is the PCI device number, and f is the PCI function number of the desired device.
Example: flashprog -p nic3com:pci=05:04.0
π atavia programmer
Due to the mysterious address handling of the VIA VT6421A controller π», the user can specify an offset with the:
flashprog -p atavia:offset=addr
syntax where addr will be interpreted as usual (leading 0x (0) for hexadecimal (octal) values, or else decimal). For more info pls see its wiki page β¨https://flashprog.org/VT6421Aβ©.
π atapromise programmer
This programmer is currently limited to 32 kB, regardless of the actual size of the flash chip π. This stems from the fact that, on the tested device (a Promise Ultra100), not all of the chip's address lines were actually connected. You may still use this programmer to flash firmware updates, since these are only 16 kB in size (padding to 32 kB is required).
π nicintel_eeprom programmer
This is the first programmer module in flashprog that doesn't provide access to NOR flash chips but to EEPROMs mounted on gigabit Ethernet cards based on Intel's 82580 NIC π. Because EEPROMs normally do not announce their size nor allow themselves to be identified, the controller relies on correct size values written to predefined addresses within the chip. Flashprog follows this scheme but assumes the minimum size of 16 kB (128 kb) if an unprogrammed EEPROM/card is detected. Intel specifies the following EEPROMs to be compatible: Atmel AT25128, AT25256, Micron (ST) M95128, M95256 and OnSemi (Catalyst) CAT25CS128 β¨.
π nicamd programmer
This programmer module supports parallel flash up to 1MiB, attached to AMD PCnet cards π. Since it can't be said for sure if all 20 parallel address lines are connected on a given card, flashprog will try to probe the addressable size. If this doesn't work reliably, one can override the probing logic with the max_decode_kb parameter:
flashprog -p nicamd:max_decode_kb=128
π gfxmatrox programmer
Okay so this one is for parallel flash up to 64KiB πΎ that's physically attached to Matrox graphics cards. The ROM BAR is what we use to read and write that flash. But here's the tea: the whole BAR register is disabled by default, so there's a very real chance we have to set it up ourselves π. The ROM BAR decoding takes precedence, which means we can totally borrow the MMIO BAR address β but we have to make double sure no graphics driver is running. Because of that, the borrowing has to be explicitly turned on with the bar=no_gfx_driver_running argument.
flashprog -p gfxmatrox:bar=no_gfx_driver_running
π¦ ft2232_spi programmer
This module supports a whole squad of programmers based on the FTDI FT2232/FT4232H/FT4233H/FT232H chips, including:
- DLP Design DLP-USB1232H
- openbiosprog-spi
- Amontec JTAGkey/JTAGkey-tiny/JTAGkey-2
- Dangerous Prototypes Bus Blaster
- Olimex ARM-USB-TINY/-H
- Olimex ARM-USB-OCD/-H
- OpenMoko Neo1973 Debug board (V2+)
- TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA)
- TUMPA Lite
- GOEPEL PicoTAP
- Google Servo v1/v2
- Tin Can Tools Flyswatter/Flyswatter 2
- Kristech KT-LINK
An optional parameter tells it the controller type plus the channel/interface/port it should support. For that you use the
flashprog -p ft2232_spi:type=model,port=interface
syntax, where model can be 2232H, 4232H, 232H, jtagkey, busblaster, openmoko, arm-usb-tiny, arm-usb-tiny-h, arm-usb-ocd, arm-usb-ocd-h, tumpa, tumpalite, picotap, google-servo, google-servo-v2, google-servo-v2-legacy or kt-link. And interface can be A, B, C, or D. The default model is 4232H, the default interface is A, and GPIO is not used by default. periodt π
If there's more than one ft2232_spi-compatible device plugged in, you can pick which one gets the job with its serial number:
flashprog -p ft2232_spi:serial=number
where number is the serial number of the device (you can find it, for example, in the output of lsusb -v) π.
All models supported by the ft2232_spi driver can configure the SPI clock rate by setting a divisor. The expressible divisors are all even numbers between 2 and 2^17 (=131072), which gives you SPI clock frequencies of 6 MHz down to about 92 Hz for 12 MHz inputs (non-H chips), and 30 MHz down to about 458 Hz for 60 MHz inputs ('H' chips). The default divisor is set to 2, but you can use another one by passing the optional divisor parameter with the
flashprog -p ft2232_spi:divisor=div
syntax.
Using the parameter csgpiol (DEPRECATED - use gpiol instead) an additional CS# pin can be chosen, where the value can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. Example:
flashprog -p ft2232_spi:csgpiol=3
The parameter gpiolX=[HLC] lets you use the GPIOL pins either as generic gpios with a fixed value during flashing, or as an additional CS# signal. X can be a number between 0 and 3, denoting GPIOL0-GPIOL3 correspondingly. The parameter may be specified multiple times, one time per GPIOL pin. Valid values are H, L and C:
H- Set GPIOL output highL- Set GPIOL output lowC- Use GPIOL as additional CS# output
Example:
flashprog -p ft2232_spi:gpiol0=H
Heads up bestie: not all GPIOL pins are freely usable with all programmers, because some of them have special functionality π« .
β¨ ft4222_spi programmer
This driver supports programmers based on the FTDI FT4222H chip.
An optional cs parameter can be used to select the USB interface and respective CS# output 0..3, e.g.
flashprog -p ft4222_spi:cs=3
The ft4222_spi driver supports setting the SPI clock rate in kHz with the spispeed parameter. The actual clock rate will be rounded down to a supported value (power-of-2 fractions of 80MHz, 60MHz and 48MHz base clocks). So the highest supported SPI clock rates are 40MHz, 30MHz, 24Mhz, 20MHz, 15MHz, 12MHz, and so forth. And because this also affects the base clock of the controller and thereby the overall bandwidth, there's a lil wrinkle π: Quad-i/o reads can actually be faster at 20MHz (80MHz base clock) than they are at 30MHz or 24MHz with a lower base clock.
flashprog -p ft4222_spi:spispeed=20000
The default is 10MHz.
Since the FT4222H supports dual and quad i/o, there's an extra iomode parameter to say how many lines can be used for bidirectional i/o. Valid values are single, dual, or quad. The default is dual because at least two lines are always connected (MOSI and MISO). Quad i/o is most useful for getting high transfer rates when the hardware setup isn't reliable enough for high clock rates, e.g.
flashprog -p ft4222_spi:spispeed=15000,iomode=quad
Note that the overall bandwidth of the FT4222H is limited to 52.8Mb/s (with the 80MHz base clock). That's almost saturated at 20MHz x4 π.
πΈ serprog programmer
This module supports all programmers that speak the serprog protocol. That includes some Arduino-based devices as well as a bunch of programmers by Urja Rannikko, Juhana Helovuo, Stefan Tauner, Chi Zhang and many others π.
A mandatory parameter specifies either a serial device (and baud rate) or an IP/port combination for talking to the programmer. The device/baud combo has to start with dev= and separate the optional baud rate with a colon. For example
flashprog -p serprog:dev=/dev/ttyS0:115200
If no baud rate is given, the default values by the operating system/hardware will be used. For IP connections you have to use the
flashprog -p serprog:ip=ipaddr:port
syntax. If the device supports it, you can set the SPI clock frequency with the optional spispeed parameter. The frequency is parsed as hertz, unless an M or k suffix is given, in which case megahertz or kilohertz are used respectively. Example that sets the frequency to 2 MHz:
flashprog -p serprog:dev=/dev/ttyACM0,spispeed=2M
If the device supports it, you can also set which SPI Chip Select to use with the optional cs parameter. Example that tells the programmer to use chip select number 0:
flashprog -p serprog:dev=/dev/ttyACM0:cs=0
More information about serprog is available in serprog-protocol.txt in the source distribution π.
π buspirate_spi programmer
A required dev parameter specifies the Bus Pirate device node, and an optional spispeed parameter specifies the frequency of the SPI bus. The parameter delimiter is a comma. Syntax is
flashprog -p buspirate_spi:dev=/dev/device,spispeed=frequency
where frequency can be 30k, 125k, 250k, 1M, 2M, 2.6M, 4M or 8M (in Hz). The default is the maximum frequency of 8 MHz.
The baud rate for communication between the host and the Bus Pirate can be specified with the optional serialspeed parameter. Syntax is
flashprog -p buspirate_spi:serialspeed=baud
where baud can be 115200, 230400, 250000 or 2000000 (2M). The default is 2M baud for Bus Pirate hardware version 3.0 and greater, and 115200 otherwise.
An optional pullups parameter specifies the use of the Bus Pirate internal pull-up resistors. This may be needed if you're working with a flash ROM chip that you've physically removed from the board. Syntax is
flashprog -p buspirate_spi:pullups=state
where state can be on or off. More info about the Bus Pirate pull-up resistors and what they're for is available in a guide by dangerousprototypes β¨http://dangerousprototypes.com/docs/Practical_guide_to_Bus_Pirate_pull-up_resistorsβ©.
The state of the Bus Pirate power supply pins is controllable through an optional psus parameter. Syntax is
flashprog -p buspirate_spi:psus=state
where state can be on or off. This lets the bus pirate power the ROM chip directly. It may also be used to provide the required pullup voltage (when using the pullups option), by connecting the Bus Pirate's Vpu input to the appropriate Vcc pin β‘.
π pickit2_spi programmer
An optional voltage parameter specifies the voltage the PICkit2 should use. The default unit is Volt if no unit is specified. You can use mV, millivolt, V or Volt as unit specifier. Syntax is
flashprog -p pickit2_spi:voltage=value
where value can be 0V, 1.8V, 2.5V, 3.5V or the equivalent in mV.
An optional spispeed parameter specifies the frequency of the SPI bus. Syntax is
flashprog -p pickit2_spi:spispeed=frequency
where frequency can be 250k, 333k, 500k or 1M (in Hz). The default is a frequency of 1 MHz.
π dediprog programmer
An optional voltage parameter specifies the voltage the Dediprog should use. The default unit is Volt if no unit is specified. You can use mV, milliVolt, V or Volt as unit specifier. Syntax is
flashprog -p dediprog:voltage=value
where value can be 0V, 1.8V, 2.5V, 3.5V or the equivalent in mV.
An optional device parameter specifies which of multiple connected Dediprog devices should be used. Please be aware that the order depends on libusb's usb_get_busses() function and that the numbering starts at 0. Usage example to select the second device:
flashprog -p dediprog:device=1
An optional spispeed parameter specifies the frequency of the SPI bus. The firmware on the device needs to be 5.0.0 or newer. Syntax is
flashprog -p dediprog:spispeed=frequency
where frequency can be 375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M or 24M (in Hz). The default is a frequency of 12 MHz.
An optional target parameter specifies which target chip should be used. Syntax is
flashprog -p dediprog:target=value
where value can be 1 or 2 to select target chip 1 or 2 respectively. The default is target chip 1 π―.
Okay so Dediprog SF600 and SF700 models? Absolute kings, they do dual and quad i/o. π
The default is dual i/o on the newer models rocking protocol v3, and single i/o otherwise. Wanna pick your own? That's the iomode parameter, bestie. Valid values are single, dual, or quad. So like, to enable quad i/o:
flashprog -p dediprog:iomode=quad
rayer_spi programmer
The default I/O base address used for the parallel port is 0x378, and you can use the optional iobase parameter to specify an alternate base I/O address with the
flashprog -p rayer_spi:iobase=baseaddr
syntax where baseaddr is base I/O port address of the parallel port, which must be a multiple of four. And no cap, do NOT forget the "0x" prefix for hexadecimal port addresses, okay? That's the vibes-ruiner right there. π«
The default cable type is the RayeR cable. You can use the optional type parameter to specify the cable type with the
flashprog -p rayer_spi:type=model
syntax where model can be rayer for the RayeR cable, byteblastermv for the Altera ByteBlasterMV, stk200 for the Atmel STK200/300, wiggler for the Macraigor Wiggler, xilinx for the Xilinx Parallel Cable III (DLC 5), or spi_tt for SPI Tiny Tools-compatible hardware.
More info about the RayeR hardware lives at RayeR's website β¨http://rayer.g6.cz/elektro/spipgm.htmβ©. The Altera ByteBlasterMV datasheet can be obtained from Altera β¨http://www.altera.co.jp/literature/ds/dsbytemv.pdfβ©. For more about the Macraigor Wiggler, see their company homepage β¨http://www.macraigor.com/wiggler.htmβ©. And the schematic of the Xilinx DLC 5 was published in a Xilinx user guide β¨http://www.xilinx.com/support/documentation/user_guides/xtp029.pdfβ©. β¨
pony_spi programmer
The serial port (like /dev/ttyS0, /dev/ttyUSB0 on Linux or COM3 on windows) is specified using the mandatory dev parameter. Not optional, babe, it's required. The adapter type is selectable between SI-Prog (used for SPI devices with PonyProg 2000) or a custom made serial bitbanging programmer named "serbang". The optional type parameter accepts the values "si_prog" (default) or "serbang".
Info about the SI-Prog adapter can be found at its website β¨http://www.lancos.com/siprogsch.htmlβ©.
An example call to flashprog is
flashprog -p pony_spi:dev=/dev/ttyS0,type=serbang
Please note that while USB-to-serial adapters work under certain circumstances, this slows down operation considerably. π
ogp_spi programmer
The flash ROM chip you're accessing must be specified with the rom parameter.
flashprog -p ogp_spi:rom=name
Where name is either cprom or s3 for the configuration ROM, and bprom or bios for the BIOS ROM. And if more than one card supported by the ogp_spi programmer is installed in your system, you have to specify the PCI address of the card you want to use with the pci= parameter, as explained in the nic3com et al. section above. π
linux_gpio_spi programmer
Either the GPIO device node or the chip number, plus the GPIO numbers of the SPI lines, must be specified like in the following examples:
flashprog -p linux_gpio_spi:dev=/dev/gpiochip0,cs=8,sck=11,mosi=10,miso=9
or
flashprog -p linux_gpio_spi:gpiochip=0,cs=8,sck=11,mosi=10,miso=9
So here, gpiochip=0 selects the GPIO chip 0, accessible through Linux device node /dev/gpiochip0, and the cs, sck, mosi, miso arguments select the GPIO numbers used as SPI lines connected to the flash ROM chip. If libgpiod 2.0 or later is available, dual-i/o is enabled by default with bidirectional MOSI and MISO lines, and if a quad-i/o capable chip is connect with four lines, the additional GPIOs can be specified via io2 and io3 parameters. π₯
In the example above, the GPIO numbers of the hardware SPI lines of a Raspberry Pi single board computer are specified. The first four GPIO parameters are mandatory. Note that this is a bitbanged driver, and if your device has a hardware SPI controller, use the linux_spi programmer driver instead for better performance. She's giving "works but slow" energy, ngl.
Refer to the output of the gpioinfo utility to make sure the GPIO numbers are correct and unused. Fr fr, double-check that.
Please note that the linux_gpio_spi driver only works on Linux, and depends on libgpiod. π§
linux_mtd programmer
You may specify the MTD device to use with the
flashprog -p linux_mtd:dev=/dev/mtdX
syntax where /dev/mtdX is the Linux device node for your MTD device. If left unspecified, the first MTD device found (e.g. /dev/mtd0) will be used by default. She picks for you, how generous. π
Please note that the linux_mtd driver only works on Linux.
linux_spi programmer
You have to specify the SPI controller to use with the
flashprog -p linux_spi:dev=/dev/spidevX.Y
syntax where /dev/spidevX.Y is the Linux device node for your SPI controller.
In case the device supports it, you can set the SPI clock frequency with the optional spispeed parameter. The frequency is parsed as kilohertz. Example that sets the frequency to 8 MHz:
flashprog -p linux_spi:dev=/dev/spidevX.Y,spispeed=8000
Please note that the linux_spi driver only works on Linux. π§β¨
mstarddc_spi programmer
The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging information between a computer and attached displays. Its most common uses are getting display capabilities through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address 0x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49. This flashprog module allows the latter via Linux's I2C driver. The way it just... does that? Iconic.
IMPORTANT: Before using this programmer, the display MUST be in standby mode, and only connected to the computer that will run flashprog using a VGA cable, to an inactive VGA output. It absolutely MUST NOT be used as a display during the procedure! π¨ This is not a drill, bestie, read it twice.
You have to specify the DDC/I2C controller and I2C address to use with the
flashprog -p mstarddc_spi:dev=/dev/i2c-X:YY
syntax where /dev/i2c-X is the Linux device node for your I2C controller connected to the display's DDC channel, and YY is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used). Example that uses I2C controller /dev/i2c-1 and address 0x49:
flashprog -p mstarddc_spi:dev=/dev/i2c-1:49
It is also possible to inhibit the reset command that is normally sent to the display once the flashprog operation is completed, using the optional noreset parameter. A value of 1 prevents flashprog from sending the reset command. Example that does not reset the display at the end of the operation:
flashprog -p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
Please note that sending the reset command is also inhibited if an error occurred during the operation. To send the reset command afterwards, you can simply run flashprog once more, in chip probe mode (not specifying an operation), without the noreset parameter, once the flash read/write operation you intended to perform has completed successfully.
Please also note that the mstarddc_spi driver only works on Linux. π§
ch341a_spi programmer
The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is used as per the device. That's it, that's the whole vibe. Simple queen. π
ch347_spi programmer
The driver is currently hard-coded to use CS0. An optional spispeed parameter specifies the frequency of the SPI bus. Syntax is
flashprog -p ch347_spi:spispeed=frequency
where frequency is given in kHz and can be in the range 468 .. 60000. The frequency will be rounded down to a supported value (60 MHz divided by a power of 2). The default is a frequency of 7.5 MHz. The SPI mode can also be set using the spimode parameter:
flashprog -p ch347_spi:spimode=mode
where mode is in the range 0 to 3. The default is mode 0.
ni845x_spi programmer
An optional voltage parameter could be used to specify the IO voltage. This parameter is available for the NI USB-8452 device. The default unit is Volt if no unit is specified. You can use mV, milliVolt, V or Volt as unit specifier. Syntax is
flashprog -p ni845x_spi:voltage=value
where value can be 1.2V, 1.5V, 1.8V, 2.5V, 3.3V or the equivalent in mV.
In the case if none of the programmer's supported IO voltage is within the supported voltage range of the detected flash chip, the flashprog will abort the operation (to prevent damaging the flash chip). π± You can override this behaviour by passing "yes" to the ignore_io_voltage_limits parameter (for e.g. if you are using an external voltage translator circuit). Syntax is
flashprog -p ni845x_spi:ignore_io_voltage_limits=yes
You can use the serial parameter to explicitly specify which connected NI USB-845x device should be used. You should use your device's 7 digit hexadecimal serial number. Usage example to select the device with 1230A12 serial number:
flashprog -p ni845x_spi:serial=1230A12
An optional spispeed parameter specifies the frequency of the SPI bus. Syntax is
flashprog -p ni845x_spi:spispeed=frequency
where frequency should a number corresponding to the desired frequency in kHz. The maximum frequency is 12 MHz (12000 kHz) for the USB-8451 and 50 MHz (50000 kHz) for the USB-8452. The default is a frequency of 1 MHz (1000 kHz).
digilent_spi programmer
An optional spispeed parameter specifies the frequency of the SPI bus. Syntax is
flashprog -p digilent_spi:spispeed=frequency
where frequency can be 62.5k, 125k, 250k, 500k, 1M, 2M or 4M (in Hz). The default is a frequency of 4 MHz. π
dirtyjtag_spi programmer
An optional spispeed parameter specifies the frequency of the SPI bus. Syntax is
flashprog -p dirtyjtag_spi:spispeed=frequency
okay so frequency can be any value in hertz, kilohertz or megahertz that your programmer supports β genuinely any of them π β and the default is a frequency of 100 kHz. yes bestie, one hundred. she's not fast but she's reliable. π
π jlink_spi programmer π¦
This module supports SEGGER J-Link and compatible devices. no cap.
Okay so wiring time, pay attention because this is the part where people mess up and then text the group chat at 2am π. The MOSI signal of the flash chip must be attached to the TDI pin of the programmer, MISO goes to TDO, and SCK goes to TCK. that's the vibe. that's the mapping. π«Ά
The chip select (CS) signal of the flash chip can be attached to different pins of the programmer, and you pick which one with the
flashprog -p jlink_spi:cs=pin
syntax, where pin can be either TRST or RESET. The default pin for chip select is RESET. and okay quick heads up so you don't panic: when using RESET, it is normal that the indicator LED blinks orange or red. it is not broken. she is just like that. πβ¨
Additionally, the VTref pin of the programmer must be attached to the logic level of the flash chip. The programmer measures the voltage on this pin and generates the reference voltage for its input comparators and adapts its output voltages to it. she's literally reading the room and matching energy. iconic. π
Pinout for devices with 20-pin JTAG connector:
+-------+
| 1 2 | 1: VTref 2:
| 3 4 | 3: TRST 4: GND
| 5 6 | 5: TDI 6: GND
+-+ 7 8 | 7: 8: GND
| 9 10 | 9: TCK 10: GND
| 11 12 | 11: 12: GND
+-+ 13 14 | 13: TDO 14:
| 15 16 | 15: RESET 16:
| 17 18 | 17: 18:
| 19 20 | 19: PWR_5V 20:
+-------+
(VTref, TRST, TDI, TCK, TDO, RESET, PWR_5V β those are the ones that matter, the empty ones are just living their truth π)
If there is more than one compatible device connected, you can select which one should be used by specifying its serial number with the
flashprog -p jlink_spi:serial=number
syntax, where number is the serial number of the device (which can be found for example in the output of lsusb -v). go off, lsusb -v, tell us everything bestie. π
The SPI speed can be selected by using the
flashprog -p jlink_spi:spispeed=frequency
syntax, where frequency is the SPI clock frequency in kHz. The maximum speed depends on the device in use β so like, don't just send it. check first. πΈ
The power=on option can be used to activate the 5 V power supply (PWR_5V) of the J-Link during a flash operation. free voltage, no extra cable, we love to see it. β‘
π stlinkv3_spi programmer π
This module supports SPI flash programming through the STMicroelectronics STLINK V3 programmer/debugger's SPI bridge interface
flashprog -p stlinkv3_spi
that's it. that's the whole invocation. chef's kiss. π
If there is more than one compatible device connected, you can select which one should be used by specifying its serial number with the
flashprog -p stlinkv3_spi:serial=number
syntax, where number is the serial number of the device (which can be found for example in the output of lsusb -v). same detective work as before, bestie. π
The SPI speed can be selected by using the
flashprog -p stlinkv3_spi:spispeed=frequency
syntax, where frequency is the SPI clock frequency in kHz. If the passed frequency is not supported by the adapter the nearest lower supported frequency will be used. so she rounds down, not up β she's not about to overpromise. very demure. π
β¨ EXAMPLES β¨
To back up and update your BIOS, run
flashprog -p internal -r backup.rom -o backuplog.txt
flashprog -p internal -w newbios.rom -o writelog.txt
Please make sure to copy backup.rom to some external media before you try to write. That makes offline recovery easier.
fr fr do not skip that step. that's your emergency parachute. πͺ
If writing fails and flashprog complains about the chip being in an unknown state, you can try to restore the backup by running
flashprog -p internal -w backup.rom -o restorelog.txt
see? the backup was the whole point. she told you. π
If you encounter any problems, please contact us and supply backuplog.txt, writelog.txt and restorelog.txt. See section BUGS for contact info. the logs are literally the receipts and we need them. π§Ύ
πͺ EXIT STATUS πͺ
flashprog exits with 0 on success, 1 on most failures, but with 3 if a call to mmap() fails. so if you get a 3, that's not a normal fail, that's a memory-mapping situation specifically. iykyk. π
π REQUIREMENTS π
flashprog needs different access permissions for different programmers. every one of them has her own needs and honestly? valid. π
- internal needs raw memory access, PCI configuration space access, raw I/O port access (x86) and MSR access (x86).
- atavia needs PCI configuration space access.
- nic3com, nicrealtek and nicnatsemi need PCI configuration space read access and raw I/O port access.
- atahpt needs PCI configuration space access and raw I/O port access.
- gfxmatrox, gfxnvidia, drkaiser and it8212 need PCI configuration space access and raw memory access.
- rayer_spi needs raw I/O port access.
- satasii, scsilsi, nicintel, nicintel_eeprom and nicintel_spi need PCI configuration space read access and raw memory access.
- nicamd, satamv and atapromise need PCI configuration space read access, raw I/O port access and raw memory access.
- serprog needs TCP access to the network or userspace access to a serial port.
- buspirate_spi needs userspace access to a serial port.
- ft2232_spi, usbblaster_spi and pickit2_spi need access to the respective USB device via libusb API version 0.1.
- ch341a_spi and dediprog need access to the respective USB device via libusb API version 1.0.
- dummy needs no access permissions at all. she's the low-maintenance one. π
And these ones have to be run as superuser/root, and need additional raw access permission:
internal, nicamd, nic3com, nicrealtek, nicnatsemi, gfxmatrox, gfxnvidia, drkaiser, satamv, satasii, scsilsi, atahpt, atavia and atapromise π
Meanwhile these can be run as normal user on most operating systems if appropriate device permissions are set:
serprog, buspirate_spi, dediprog, usbblaster_spi, ft2232_spi, pickit2_spi, ch341a_spi, digilent_spi and dirtyjtag_spi π«Ά
- ogp needs PCI configuration space read access and raw memory access.
On OpenBSD, you can obtain raw access permission by setting securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single user mode. extreme measures but okay, we do what we must. π
π BUGS π
You can report bugs, ask us questions or send success reports via our communication channels listed here: https://www.flashprog.org/Contact. we genuinely want to hear about it, even the wins. especially the wins. π
Also, we provide a pastebin service β¨https://paste.flashrom.orgβ© that is very useful to share logs without spamming the communication channels. besties, please use the pastebin. no one wants 400 lines of hex in the group chat. π
π» Laptops π»
Using flashprog on older laptops is dangerous and may easily make your hardware unusable.
not being dramatic, that's just the truth and it's giving β οΈ. flashprog will attempt to detect if it is running on a susceptible laptop and restrict flash-chip probing for safety reasons. Please see the detailed discussion of this topic and associated flashprog options in the Laptops paragraph in the internal programmer subsection of the PROGRAMMER-SPECIFIC INFORMATION section and the information in our wiki β¨https://flashprog.org/Laptopsβ©. read it before you yolo, i'm begging π
π One-time programmable (OTP) memory and unique IDs π
Some flash chips contain OTP memory often denoted as "security registers". They usually have a capacity in the range of some bytes to a few hundred bytes and can be used to give devices unique IDs etc. flashprog is not able to read or write these memories and may therefore not be able to duplicate a chip completely. so if you're trying to make a perfect clone and the chip has OTP, that part is just not happening, bestie. π For chip types known to include OTP memories a warning is printed when they are detected. listen to the warning. π«Ά
Similar to OTP memories are unique, factory programmed, unforgeable IDs. They are not modifiable by the user at all. not by you, not by me, not by anyone. periodt. π
π LICENSE π
flashprog is covered by the GNU General Public License (GPL), version 2. Some files are additionally available under any later version of the GPL. open source royalty, as she should be. π
Β© COPYRIGHT Β©
Please see the individual files. short and mysterious and honestly iconic. π
π AUTHORS π
Giving the whole team their flowers, one bullet at a time πΈ:
- Andrew Morgan
- Carl-Daniel Hailfinger
- Claus Gindhart
- David Borg
- David Hendricks
- Dominik Geyer
- Edward O'Callaghan
- Eric Biederman
- Giampiero Giancipoli
- Helge Wagner
- Idwer Vollering
- Joe Bao
- Joerg Fischer
- Joshua Roys
- KyΓΆsti MΓ€lkki
- Luc Verhaegen
- Li-Ta Lo
- Mark Marshall
- Markus Boas
- Mattias Mattsson
- Michael Karcher
- Nikolay Petukhov
- Patrick Georgi
- Peter Lemenkov
- Peter Stuge
- Reinder E.N. de Haan
- Ronald G. Minnich
- Ronald Hoogenboom
- Sean Nelson
- Stefan Reinauer
- Stefan Tauner
- Stefan Wildemann
- Stephan Guilloux
- Steve Markgraf
- Steven James
- Urja Rannikko
- Uwe Hermann
- Wang Qingpei
- Yinghai Lu
- some others, please see the flashprog git history for details.
Active maintainers can be reached via the mailing list β¨flashprog@flashprog.orgβ©. yes they actually answer, go say hi. π«Ά
This manual page was written by Uwe Hermann β¨uwe@hermann-uwe.deβ©, Carl-Daniel Hailfinger, Stefan Tauner and others. It is licensed under the terms of the GNU GPL (version 2 or later). π
π SEE ALSO π
go read them too, that's your homework, bestie πβ¨
and that's a wrap on the whole page!! flashprog-v1.6, dated 2026-07-17 π thank you for coming to my ted talk, now go back up your BIOS before you flash anything. mwah. π ππ¦
π¦ where this page comes from
- nixos 26.05: flashprog 1.6
- nixpkgs unstable: flashprog 1.6
- ubuntu stonking: flashprog 1.6-1 Β· GPL-2.0-or-later
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms