SIMD(7)

🦋 simd — SIMD enhancements ✨

okay so this is simd(7), and it's genuinely one of those pages where you find out your libc has been secretly lifting weights this whole time 💪✨

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🌸 NAME 🌸

simd — SIMD enhancements, bestie. that's the whole vibe.

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💖 DESCRIPTION 💖

on some architectures, the FreeBSD libc hands you enhanced implementations of functions you use every single day, replacing the architecture-independent versions you'd get otherwise. no cap. 🫶

depending on the architecture and the function, one of two things happens:

• the enhanced implementation is always used, periodt, or
• the libc detects at runtime which SIMD instruction set extensions the machine actually supports, and picks the most suitable implementation automatically — main character energy, it just knows 💅

on amd64, the environment variable ARCHLEVEL is your cheat code to override this whole mechanism (more on her in a sec 👀).

enhanced functions exist for these architectures: aarch64, arm, amd64, i386, ppc64, riscv 🌈

🎀 the function roster 🎀

(the original is a big grid — here it is as a list, every cell preserved, i promise 🙈)

• bcmp — aarch64: A; amd64: S1; i386: S
• bcopy — aarch64: A; arm: S; amd64: S; i386: S; ppc64: SV; riscv: S
• bzero — aarch64: A; arm: S; amd64: S; i386: S; riscv: S
• div — amd64: S; i386: S
• index — aarch64: A; amd64: S1; ppc64: S
• ldiv — amd64: S; i386: S
• lldiv — amd64: S
• memchr — aarch64: A; amd64: S1; riscv: S
• memcmp — aarch64: A; arm: S; amd64: S1; i386: S
• memccpy — aarch64: A; amd64: S1
• memcpy — aarch64: A; arm: S; amd64: S; i386: S; ppc64: SV; riscv: S
• memmove — aarch64: A; arm: S; amd64: S; i386: S; ppc64: SV
• memrchr — aarch64: A; amd64: S1
• memset — aarch64: A; arm: S; amd64: S; i386: S; riscv: S
• rindex — aarch64: A; amd64: S1; i386: S; riscv: S
• stpcpy — aarch64: A; amd64: S1
• stpncpy — amd64: S1
• strcat — aarch64: A; amd64: S1; i386: S
• strchr — aarch64: A; amd64: S1; i386: S; riscv: S
• strchrnul — aarch64: A; amd64: S1; riscv: S
• strcmp — aarch64: A; arm: S; amd64: S1; i386: S
• strcpy — aarch64: A; amd64: S1; i386: S; ppc64: S2
• strcspn — arm: S; amd64: S2
• strlcat — aarch64: A; amd64: S1
• strlcpy — aarch64: A; amd64: S1
• strlen — aarch64: A; arm: S; amd64: S1; riscv: S
• strncat — aarch64: A; amd64: S1
• strncmp — aarch64: A; arm: S; amd64: S1; i386: S
• strncpy — amd64: S1; ppc64: S2
• strnlen — aarch64: A; amd64: S1; riscv: S
• strrchr — aarch64: A; amd64: S1; i386: S; riscv: S
• strpbrk — arm: S; amd64: S2
• strsep — arm: S; amd64: S2
• strspn — arm: S; amd64: S2
• swab — i386: S
• timingsafe_bcmp — aarch64: A; amd64: S1
• timingsafe_memcmp — arm: S; amd64: S
• wcschr — amd64: S
• wcscmp — amd64: S
• wcslen — amd64: S
• wmemchr — amd64: S

🔑 the legend, iykyk 🔑

• S: scalar (non-SIMD)
• 1: amd64 baseline
• 2: x86-64-v2 or PowerPC 2.05
• 3: x86-64-v3
• 4: x86-64-v4
• V: PowerPC VSX
• A: Arm ASIMD (NEON)

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⭐ ENVIRONMENT ⭐

• ARCHLEVEL — on amd64, this is the girl who controls the level of SIMD enhancements used 💅. if it's set to an architecture level from the list below and the processor actually supports that level, then SIMD enhancements up to ARCHLEVEL get used. if ARCHLEVEL is unset, not recognised, or not supported by the processor, then the highest level of SIMD enhancements supported by the processor is used. she always has a fallback, queen 🎀

a suffix beginning with : or + in ARCHLEVEL is ignored and may be used for future extensions. the architecture level can also be prefixed with a ! character to force use of the requested architecture level, even if the processor does not advertise that it's supported. ⚠️ this usually causes applications to crash and should only be used for testing purposes or if architecture level detection yields incorrect results. like, for real, careful babe 😭

the architecture levels follow the AMD64 SysV ABI supplement:

• scalar — scalar enhancements only (no SIMD)
• baseline — cmov, cx8, x87 FPU, fxsr, MMX, osfxsr, SSE, SSE2
• x86-64-v2 — cx16, lahf/sahf, popcnt, SSE3, SSE3, SSE4.1, SSE4.2
• x86-64-v3 — AVX, AVX2, BMI1, BMI2, F16C, FMA, lzcnt, movbe, osxsave
• x86-64-v4 — AVX-512F/BW/CD/DQ/VL

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🩺 DIAGNOSTICS 🩺

Illegal Instruction — printed by sh(1) if a command is terminated through delivery of a SIGILL signal, see signal(3).

use of an unsupported architecture level was forced by setting ARCHLEVEL to a string beginning with a ! character, causing a process to crash due to use of an unsupported instruction. the fix? unset ARCHLEVEL, remove the ! prefix, or select a supported architecture level 🫶

this message may also appear for unrelated reasons. she's not always about you 💀

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👀 SEE ALSO 👀

string(3), arch(7)

H. J. Lu, Michael Matz, Milind Girkar, Jan Hubička, Andreas Jaeger, and Mark Mitchell, “AMD64 Architecture Processor Supplement”, System V Application Binary Interface, May 23, 2023, Version 1.0.

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🕰️ HISTORY 🕰️

architecture-specific enhanced libc functions were added starting with FreeBSD 2.0 for i386, FreeBSD 6.0 for arm, FreeBSD 6.1 for amd64, FreeBSD 11.0 for aarch64, FreeBSD 12.0 for powerpc64, and FreeBSD 16.0 for riscv64. 🌱

SIMD-enhanced functions were first added with FreeBSD 13.0 for powerpc64 and with FreeBSD 14.1 for amd64. glow-up timeline fr fr ✨

a simd manual page appeared in FreeBSD 14.1. iconic entrance, no notes 👑

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💜 AUTHOR 💜

Robert Clausecker <fuz@FreeBSD.org> — ty for your service bestie 🫡

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🙈 CAVEATS 🙈

other parts of FreeBSD — like cryptographic routines in the kernel or in OpenSSL — may also use SIMD enhancements. those enhancements are not subject to the ARCHLEVEL variable and may have their own configuration mechanism. so don't come for ARCHLEVEL about things she doesn't control 💅

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🐛 BUGS 🐛

use of SIMD enhancements cannot be configured on powerpc64. that's it, that's the bug 😭

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and that's the tea, bestie 🍓 this page is from the Debian build, dated October 21, 2025 — SIMD(7) — go forth and let your libc cook 🔥💖