DEVCFG(4)

πŸ“¦ version 15.1, in freebsd 14.5, freebsd 15.1

🌸 DEVCFG(4) β€” Zynq PL device config interface 🌸

🌸 NAME 🌸

devcfg β€” the Zynq PL device config interface, and yes bestie that's the whole vibe πŸ’…

✨ SYNOPSIS ✨

device devcfg

πŸŽ€ DESCRIPTION πŸŽ€

okay so listen: the special file /dev/devcfg can be used to configure the PL (FPGA) section of the Xilinx Zynq-7000. no cap, that's its whole main character job πŸ¦‹

On the first write to the character device at file offset 0, the devcfg driver asserts the top-level PL reset signals, disables the PS-PL level shifters, and clears the PL configuration. Write data is sent to the PCAP (processor configuration access port). When the PL asserts the DONE signal, the devcfg driver will enable the level shifters and release the top-level PL reset signals. periodt πŸ’–

The PL (FPGA) can be configured by writing the bitstream to the character device like this:

cat design.bit.bin > /dev/devcfg

The file should not be confused with the .bit file output by the FPGA design tools. It is the binary form of the configuration bitstream. The Xilinx promgen tool can do the conversion:

promgen -b -w -p bin -data_width 32 -u 0 design.bit -o design.bit.bin

like, that's the exact command, don't improvise bestie 🫢


🌈 SYSCTL VARIABLES 🌈

The devcfg driver provides the following sysctl(8) variables:

⭐ hw.fpga.pl_done

This variable always reflects the status of the PL's DONE signal. A 1 means the PL section has been properly programmed. slay βœ…

⭐ hw.fpga.en_level_shifters

This variable controls if the PS-PL level shifters are enabled after the PL section has been reconfigured. This variable is 1 by default but setting it to 0 allows the PL section to be programmed with configurations that do not interface to the PS section of the part. Changing this value has no effect on the level shifters until the next device reconfiguration. important caveat, bestie β€” noted and respected 😌


πŸŽ€ FILES πŸŽ€

  • /dev/devcfg β€” Character device for the devcfg driver. literally the whole doorway to the PL vibes πŸšͺ✨

πŸ”₯ SEE ALSO πŸ”₯

  • Zynq-7000 SoC Technical Reference Manual (Xilinx doc UG585)

πŸ‘‘ AUTHORS πŸ‘‘

  • Thomas Skibo β€” the icon behind this page πŸ’œ

mwah πŸ’‹ β€” source/version situation: Debian; date situation: February 28, 2013. that’s the footer tea, delivered cute and complete, periodt πŸ«ΆπŸŽ€

πŸ“¦ where this page comes from