CHVGPIO(4)
๐ NAME ๐
chvgpio โ Intel Cherry View SoC GPIO controller. okay so bestie, this is the chvgpio(4) page from the Kernel Interfaces Manual, and it's literally here to make the GPIO situation make sense. ๐
โจ SYNOPSIS โจ
device gpio
device chvgpio
๐ฆ DESCRIPTION ๐ฆ
chvgpio supports the GPIO controller that can be found in Intel's Cherry View SoC family. ๐
The Cherry View SoC has 5 banks of GPIO pins: NORTH, EAST, SOUTHEAST, SOUTHWEST, and VIRTUAL. ๐
All but VIRTUAL are exposed to userland as /dev/gpiocN, where N is 0-3. so that's the vibe: userland gets the /dev/gpiocN nodes, and VIRTUAL stays backstage. ๐
Pins in each bank are pre-named to match names in the Intelยฎ Atomโข Z8000 Processor Series Vol 2. cute, right? the names are already done for you. ๐
๐ SEE ALSO ๐
go read these if you want the full lore, bestie:
gpio(3)gpio(4)gpioctl(8)- Intelยฎ Atomโข Z8000 Processor Series Vol 1.
- Intelยฎ Atomโข Z8000 Processor Series Vol 2.
๐ HISTORY ๐
The chvgpio manual page first appeared in FreeBSD 12. so yes, it's been doing its thing since then. โจ
๐ซถ AUTHORS ๐ซถ
This driver and man page were written by Tom Jones <tj@enoti.me>. shoutout to Tom, fr fr. ๐
xoxo, bestie โ this version comes from Debian, dated November 17, 2017. mwah ๐
๐ฆ where this page comes from
- freebsd 14.5: base 14.5
- freebsd 15.1: base 15.1
- nixpkgs unstable: source
- Copyright (c) 2017 Tom Jones <tj@enoti.me> All rights reserved
- ๐ girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms