Language(3)

📦
version 3.482 · 8 versions
, in fedora 43

💅 Language(3) — the Verilog::Language era 💅

okay bestie, welcome to the Verilog::Language glow-up ✨ this is the Language(3) page, the one your perl came with, and honestly it's giving "tiny module, big main character energy" 🎀

🌸 NAME 🌸

Verilog::Language — Verilog language utilities. that's it, that's the whole vibe 🦋

✨ SYNOPSIS ✨

look, just look at these little one-liners, they're so clean 😭

  use Verilog::Language;

  $result = Verilog::Language::is_keyword("wire");  # true
  $result = Verilog::Language::is_compdirect("`notundef");  # false
  $result = Verilog::Language::number_value("4'b111");  # 8
  $result = Verilog::Language::number_bits("32'h1b");  # 32
  $result = Verilog::Language::number_signed("1'sh1");  # 1
  @vec    = Verilog::Language::split_bus("[31,5:4]");  # 31, 5, 4
  @vec    = Verilog::Language::split_bus_nocomma("[31:29]");  # 31, 30, 29
  $result = Verilog::Language::strip_comments("a/*b*/c");  # ac

no cap, those comments are literally the receipts 💀

🦋 DESCRIPTION 🦋

Verilog::Language is your lil toolbox of general utilities for using the Verilog Language 💖 parsing numbers? determining what keywords actually exist? yeah. all of that. and like, "General functions will be added as needed" — so bestie, the roster grows when it needs to grow 🌱

👑 FUNCTIONS 👑

💜 Verilog::Language::is_keyword($symbol_string)

returns true if the symbol string you handed it is a Verilog reserved keyword 🔥 and the value it gives back tells you the language standard it belongs to, as per the begin_keywords macro: '1364-1995', '1364-2001', '1364-2005', '1800-2005', '1800-2009', '1800-2012', '1800-2017', '1800-2023', or 'VAMS'. she's thorough 💅

💜 Verilog::Language::is_compdirect($symbol_string)

returns true if the given symbol string is a Verilog compiler directive ✨ simple as that.

💜 Verilog::Language::is_gateprim($symbol_string)

returns true if the symbol is a built-in gate primitive — like "buf", "xor", etc. etc. the OGs of gate life 🫶

💜 Verilog::Language::language_keywords($year)

returns a hash of the keywords for the given language standard year, where the value of the hash is the standard in which it was defined 🎀 cute little key/value situation.

💜 Verilog::Language::language_standard($year)

sets the language standard so the module knows what counts as a keyword 👑 if you pass undef, then all standards apply — everything is a keyword, we contain multitudes 😌 The year indicates the language standard as per the `begin_keywords macro: '1364-1995', '1364-2001', '1364-2005', '1800-2005' '1800-2009', '1800-2012', '1800-2017', or '1800-2023'.

💜 Verilog::Language::language_maximum

returns the greatest language currently standardized — presently '1800-2023'. she's the moment, she's the max, periodt 💅

💜 Verilog::Language::number_bigint($number_string)

returns the numeric value of a Verilog value stored as a Math::BigInt, or undef if it's incorrectly formed 😭 btw you must use Math::BigInt yourself before calling this one, no free rides. also heads up — bigints don't have an exact size, so the NOT of a Math::BigInt may return a different value than verilog does 🙈 See also number_value and number_bitvector.

💜 Verilog::Language::number_bits($number_string)

returns the number of bits in a value string, or undef if it's incorrectly formed, or if it's not specified. note the or bestie, it's doing heavy lifting there 🧚

💜 Verilog::Language::number_bitvector($number_string)

returns the numeric value of a Verilog value stored as a Bit::Vector, or undef if it's incorrectly formed. and yes, you must use Bit::Vector yourself before calling this one too 🌸 the size of the Vector will be whatever number_bits returns. matched set, iconic.

💜 Verilog::Language::number_signed($number_string)

returns true if the Verilog value is signed, else undef. that's the whole function, she's lowkey minimal 💀

💜 Verilog::Language::number_value($number_string)

returns the numeric value of a Verilog value, or undef if it's incorrectly formed. it ignores any signed Verilog attributes, but it is returned as a perl signed integer — so it may fail for values over 31 bits 😬 caution bestie. See also number_bigint and number_bitvector.

💜 Verilog::Language::split_bus($bus)

returns a list of expanded arrays 🎀 pass it a string like "foo[5:1:2,10:9]" and it hands you back an array with ("foo[5]", "foo[3]", ...). it correctly handles connectivity expansion too, so "x[1:0] = y[3:0]" gets you intuitive results ✨ intuitive!! we love a function with emotional intelligence.

💜 Verilog::Language::split_bus_nocomma($bus)

same energy as split_bus, but faster 🏎️ caveat though — it only supports simple decimal colon-separated array specs, like "foo[3:0]". no comma chaos, she's not built for it 💅

💜 Verilog::Language::strip_comments($text)

returns your text with any // or /**/ comments stripped out, correctly handling quoted strings 🔥 and newlines are preserved in the process, so your line count survives the purge 🌈

🎀 DISTRIBUTION 🎀

Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool suite 💖 the latest version is available from CPAN and from <https://www.veripool.org/verilog-perl>.

Copyright 2000-2024 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. legal bestie said what she said 👑

🫶 AUTHORS 🫶

Wilson Snyder <wsnyder@wsnyder.org> — shoutout to the icon who made all this happen 🌟

🌈 SEE ALSO 🌈

  • Verilog-Perl
  • Verilog::EditFiles Verilog::Parser
  • Verilog::ParseSig
  • Verilog::Getopt

and the <https://www.veripool.org/verilog-mode> Verilog-Mode package for Emacs 🧚 like if you're an Emacs girlie, that one's for you.

alright bestie, that's the page 💅 brought to you by perl v5.42.0, dated 2025-07-25 — that's the Language(3) footer, now go parse some numbers, you absolute legend ⭐🍓💜

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