OPENSSL_RISCVCAP(3ossl)

💖 OPENSSL_RISCVCAP 💖 (that's the OPENSSL_RISCVCAP(3ossl) page bestie, section 3, OpenSSL manual)

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✨ NAME ✨

OPENSSL_riscvcap — the RISC-V processor capabilities vector 🦋

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🌸 SYNOPSIS 🌸

env OPENSSL_riscvcap=... <application>

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💅 DESCRIPTION 💅

okay so. libcrypto speaks RISC-V instruction set extensions, and every single one of those extensions gets its own little name in the capabilities vector. cute right?

On Linux, when libcrypto gets initialized, whatever the RISC-V Hardware Probing syscall (hwprobe) hands back gets stored in that vector. Anywhere else? Every capability is just disabled. no cap, that's the whole vibe. 💀

Now — the fun part. If you wanna override which instructions your app gets to use, you set the OPENSSL_riscvcap environment variable before you start the application. do it before. not after. 🙈

The variable looks like the RISC-V ISA string from the RISC-V Instruction Set Manual. It's case insensitive — lowercase, uppercase, doesn't matter, she's flexible 💁‍♀️. BUT (and this is the iconic plot twist) because the environment variable parser inside libcrypto has limits, an extension must be prefixed with an underscore to even be recognizable. And yes, that applies to the Vector extension too.

OPENSSL_riscvcap="rv64gc_v_zba_zbb_zbs..."

⚠️ Heads up bestie: extension implication is currently not implemented. So if you pass "rv64gc_b" as the environment variable, zba/zbb/zbs will not be implied in the capability vector. they simply do not show up. periodt.

Currently only these extensions are recognized:

• ZBA — Address Generation
  • Could be detected using hwprobe for Linux kernel >= 6.5
• ZBB — Basic bit-manipulation
  • Could be detected using hwprobe for Linux kernel >= 6.5
• ZBC — Carry-less multiplication
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZBS — Single-bit instructions
  • Could be detected using hwprobe for Linux kernel >= 6.5
• ZBKB — Bit-manipulation for Cryptography
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZBKC — Carry-less multiplication for Cryptography
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZBKX — Crossbar permutations
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKND — NIST Suite: AES Decryption
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKNE — NIST Suite: AES Encryption
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKNH — NIST Suite: Hash Function Instructions
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKSED — ShangMi Suite: SM4 Block Cipher Instructions
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKSH — ShangMi Suite: SM3 Hash Function Instructions
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZKR — Entropy Source Extension
• ZKT — Data Independent Execution Latency
  • Could be detected using hwprobe for Linux kernel >= 6.8
• V — Vector Extension for Application Processors
  • Could be detected using hwprobe for Linux kernel >= 6.5
• ZVBB — Vector Basic Bit-manipulation
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVBC — Vector Carryless Multiplication
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKB — Vector Cryptography Bit-manipulation
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKG — Vector GCM/GMAC
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKNED — NIST Suite: Vector AES Block Cipher
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKNHA — NIST Suite: Vector SHA-2 Secure Hash
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKNHB — NIST Suite: Vector SHA-2 Secure Hash
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKSED — ShangMi Suite: SM4 Block Cipher
  • Could be detected using hwprobe for Linux kernel >= 6.8
• ZVKSH — ShangMi Suite: SM3 Secure Hash
  • Could be detected using hwprobe for Linux kernel >= 6.8

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🫶 RETURN VALUES 🫶

Not available. that's it. nothing to see here bestie, moving on 💜

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🔥 EXAMPLES 🔥

Check currently detected capabilities 👑

$ openssl info -cpusettings
OPENSSL_riscvcap=RV64GC_ZBA_ZBB_ZBC_ZBS_V vlen:256

📝 Note: the first word in the displayed capabilities is the RISC-V base architecture value, which is derived from the compiler configuration. So it is therefore not overridable by the environment variable. And when the V extension is given, the riscv_vlen value is always displayed — there is no way to override the riscv_vlen by the environment variable. it's giving unbothered, immovable, booked and busy 💅

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Disables all instruction set extensions:

export OPENSSL_riscvcap="rv64gc"

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Only enable the vector extension:

export OPENSSL_riscvcap="rv64gc_v"

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👑 COPYRIGHT 👑

Copyright 2024 The OpenSSL Project Authors. All Rights Reserved. 🌈

Licensed under the Apache License 2.0 (the "License"). You may not use this file except in compliance with the License. You can obtain a copy in the file LICENSE in the source distribution or at <https://www.openssl.org/source/license.html>.

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and that's the whole page bestie, mwah 💋 this was OpenSSL 3.5.9, dated 2026-09-29 — OPENSSL_RISCVCAP(3ossl), slay, bye 🎀✨