VRENAME(1p)

✨ VRENAME 💅 (the NAME section, bestie)

okay so vrename — it changes signal names across a whole pile of Verilog files. like, all of them. no cap.

---

🌸 SYNOPSIS

vrename <filename_or_directory>...

---

🦋 DESCRIPTION

so here's the tea: vrename lets you change a signal across every level of the design hierarchy, or make a cross reference of signal names instead. and honestly? it's not just signals — it actually includes module names, macros, and other definitions too, so those can get changed as well. versatile icon behavior fr fr.

The page says Vpm runs a three step process (yes, the manpage really wrote Vpm, we're keeping the lore 💀). Here's how it goes:

step one — run this:

vrename --list  [<file.v>...]  [<directory>....]

this reads the files you named, or all the files below the directory you named, and creates a signals.vrename file. 🎀

step two — now you go edit that signals.vrename file by hand to say what the new signal names should be. manual editing era, embrace it.

step three — then run:

vrename --change [<file.v>...]  [<directory>....]

heads up bestie: inside signals.vrename, any signal names that have special characters in them have to follow Verilog naming rules — meaning they must be escaped with a leading backslash and a trailing space. vrename will try its best to preserve spacing when flipping escaped names to non-escaped and vice-versa, but sometimes it may insert extra whitespace to make sure downstream parsing behaves. so if you see a lil extra space, that's not a bug, that's the vibe check passing. ✨

---

👑 ARGUMENTS

vrename takes the following arguments:

• --help — shows you this message plus the program version, then dips out. classic.
• --version — shows the program version and exits. that's it, that's the whole thing.
• --change — grabs the signals file signals.vrename in the current directory and changes the signals in the design exactly as that file says. either --list or --change must be specified, no skipping.
• --changefile {file} — use the filename you give instead of signals.vrename. naming rights are yours.
• --changelang — includes the template you need in the signals.vrename file to change the language standard for the file. for the first run, use --list --changelang together with --language to specify the file's original language, then rerun with the --change option. the files will get escaped identifiers for the most recent Verilog standard. for example, with --language 1364-2005, do becomes \do .
• --crypt — with --list, it randomizes the signal renames. with --change, it compresses spaces and comments and applies those renames listed in the file (presumably created with vrename --list --crypt).

the comment /*ENCRYPT_ME*/ must be included in all files that need to be encrypted — or you can use the --cryptall flag instead. if a signal should not be encrypted, you can just set it in the signals.vrename list to be changed to itself. after encrypting, you'll probably want to save the signals.vrename file so you have a key for decoding, and also so it can be used for the next encryption run. when you use it that way for the next run, only new signals get new encryptions, and all the other encryptions get encrypted the same. consistency slay.

• --cryptall — same energy as --crypt, but it puts cryptic names into signals.vrename even if the file does not include ENCRYPT_ME. generally you'll then need to edit the signals.vrename file manually to exclude any top level signals that should be preserved. you've been warned 🫶
• --keywords — include keywords in the renaming list. default is to ignore keywords, since changing a keyword will probably give you unrunnable code 😭 — however, occasionally it may be necessary to rename signals that happen to match the name of keywords recently added to the language (such as bit).
• --language <1364-1995|1364-2001|1364-2005|1800-2005|1800-2009|1800-2012|1800-2017|1800-2023> — sets the language standard for the files. this decides which tokens count as signals versus keywords, like the ever-common do (which is a data-out signal, versus a do-while loop keyword). context is everything, iykyk.
• --list — creates a list of signals in the design and writes it to signals.vrename. either --list or --change must be specified.
• --nowrite — doesn't actually write the changes, just reports the files that would be changed. window shopping mode 🛍️
• --o {dir} — use the directory you give for output instead of the current directory.
• --read — reads the changes list, and lets --list append to the changes that were already read.
• --xref — includes a cross reference of where the signals are used. --list must also be specified for this to work.

---

🌈 DISTRIBUTION

Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool suite. the latest version is available from CPAN and from <https://www.veripool.org/verilog-perl>. go get it 💜

Copyright 2000-2024 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. pick your fighter, both are valid.

---

💖 AUTHORS

Wilson Snyder <wsnyder@wsnyder.org> — the main character 👑

---

⭐ SEE ALSO

• Verilog-Perl
• Verilog::Parser

---

and that's the whole page, bestie 🎀 this doc was served up by perl v5.40.1, dated 2025-04-20, and it lives in section VRENAME(1p). no notes. periodt. 💅