VHIER(1p)

πŸ“¦
version 3.482 Β· 5 versions
, in debian trixie, ubuntu resolute

πŸ‘‘ vhier β€” the manual, but make it cute

okay bestie, so vhier is a thing from the User Contributed Perl Documentation crew (that's the manual name, VHIER(1p), if you were wondering πŸ’…) and it's about to make your Verilog hierarchy look gorgeous. Let's get into it. πŸ¦‹


✨ SYNOPSIS ✨

vhier --help
vhier [verilog_options] [-o filename] [verilog_files.v...]

🌸 DESCRIPTION 🌸

So vhier reads the Verilog files you hand it on the command line, and then it outputs a whole tree of every filename, module, and cell that got referenced by that file. It's giving family tree, but for your design. 🌳✨


πŸ’œ VERILOG ARGUMENTS πŸ’œ

These ones play nice with GCC, VCS, and honestly most Verilog programs out there. Compatible king energy. πŸ‘‘

  • +define+var+value, -Dvar=value β€” Defines that preprocessor symbol for you. (yes, both spellings, the original wrote them together like that, we don't argue with the source πŸ’€)
  • -F file β€” Reads the file you name, and acts like every single line of text inside it was typed out as command line parameters. Sneaky! And heads up: any relative paths are relative to the directory that contains the file you specified. πŸ“
  • -f file β€” Same deal as -F above, reads the file and pretends all its text was command line parameters. BUT. Any relative paths are relative to the current directory instead. Different vibe, same function. 🌈
  • +incdir+dir, -Idir β€” Adds that directory to the list of places we go hunting for include directories or libraries. πŸ•΅οΈβ™€οΈ
  • +libext+ext+ext... β€” Tells us which extensions to use when we're out here finding modules. Like, if module x gets referenced, we go look in x.ext. πŸŽ€
  • -sv β€” Specifies that SystemVerilog language features should be enabled; equivalent to --language 1800-2023. And plot twist β€” this option is selected by default already, it just exists for compatibility with other simulators. It's the default main character. ✨
  • -y dir β€” Adds that directory to the list of directories searched for include directories or libraries. Same energy as the incdir one. 🫢

πŸŽ€ VHIER ARGUMENTS πŸŽ€

This is the section that's actually ours. Buckle up.

  • --help β€” Displays this message and program version, then exits. The classic. πŸ’…
  • --o file β€” Use the given filename for output instead of stdout. Yes, that's how the original spells it, two dashes, no cap.
  • --cells β€” Show the module name of all cells, in top-down order. ⬇️
  • --forest β€” Show an "ASCII-art" hierarchy tree of all cells (like ps --forest). Art. Iconic. 🌲
  • --input-files β€” Show all input filenames. If you copy all of these files, you should end up with only the files needed to represent the entire design. Chef's kiss packaging. πŸ“
  • --includes β€” Show each source filename that includes another filename. The included filename will be exactly as specified in the original source filename, so you might need to resolve it into an absolute path for further processing. Heads up on that. πŸ™ˆ
  • --instance β€” With --cells or --forest, show module instance names. 🏷️
  • --language followed by one of <1364-1995|1364-2001|1364-2005|1800-2005|1800-2009|1800-2012|1800-2017|1800-2023> β€” Set the language standard for the files. This is the thing that decides which tokens are signals versus keywords β€” like the ever-common do (a data-out signal, versus a do-while loop keyword). Context matters bestie. πŸ”
  • --resolve-files β€” Show resolved filenames passed on the command line. This converts raw module and filenames without paths so they include the library search path directory. Output filenames will be in the same order as passed on the command line. And β€” unlike --input-files or --module-files β€” hierarchy is not traversed. πŸ›‘
  • --module-files β€” Show all module filenames in top-down order. Child modules will always appear as low as possible, so if you reverse the list you get bottom-up processing of modules. And unlike input-files, header files are not included. 🧚
  • --modules β€” Show all module names. That's it, that's the option. πŸ’–
  • --no-missing β€” Do not complain about references to missing modules. Peace and quiet era. 🀫
  • --missing-modules β€” With --nomissing, show all modules that are not found. πŸ‘»
  • --skiplist file β€” The given file contains a list of regular expressions, one per line. If a module name in the design hierarchy matches one of these expressions, skip showing that module and any sub-hierarchy. Whole branch, gone, bye. 🚫
  • --synthesis β€” Define SYNTHESIS, and ignore text between ambit, pragma, synopsys or synthesis translate_off and translate_on meta comments.
⚠️ Note: using metacomments is discouraged because they have led to silicon bugs (versus ifdef SYNTHESIS). The original points you at <https://www.veripool.org/papers/TenIPEdits_SNUGBos07_paper.pdf> β€” go read it, it's real. πŸ’€
  • --top-module module β€” Start the report at the specified module name, ignoring all modules that are not the one specified with --top-module or below it, and report an error if the --top-module you specified doesn't exist. Without this option, vhier reports all modules, starting at the module(s) that have no children below them.

Also note: this option will not change the result of the --input-files list, because the files needed to parse any design are independent of which modules are used. Facts are facts. 🫢

  • --version β€” Displays program version and exits. ✌️
  • --xml β€” Create output in XML format. Fancy. πŸ”₯

🌈 DISTRIBUTION 🌈

Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool suite. The latest version is available from CPAN and from <https://www.veripool.org/verilog-perl>. Go get you some. πŸ“¦

Copyright 2005-2024 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. Pick your fighter. βš”οΈ


πŸ’œ AUTHORS πŸ’œ

Wilson Snyder <wsnyder@wsnyder.org> β€” the legend himself. πŸ‘‘


πŸ”₯ SEE ALSO πŸ”₯

  • Verilog-Perl
  • Verilog::Getopt
  • Verilog::Preproc
  • Verilog::Netlist

and that's the whole thing bestie!! πŸŽ€ This page came to you from perl v5.40.1, dated 2025-04-20 β€” so if you're reading this way later, go check for a glow-up. πŸ’…βœ¨ slay, go build something, ily πŸ¦‹

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