intel_reg(1)
π Name π
okay so bestie, welcome to intel_reg(1), straight outta the General Commands Manual π«Ά. This is the Intel graphics register multitool β read, write, dump, and decode Intel graphics MMIO and sideband registers, and more. That's the whole vibe, and yes she's iconic π
.
β¨ SYNOPSIS β¨
intel_reg [OPTIONS] COMMAND
πΈ DESCRIPTION πΈ
Intel graphics register multitool. Read, write, dump, and decode Intel graphics MMIO and sideband registers, and more. Basically she does the register stuff so you don't have to guess, periodt π .
π OPTIONS π
Heads up: some options are global, and some are specific to commands π«Ά.
--verboseβ increase verbosity. She gets chatty.--quietβ decrease verbosity. She gets chill.--count=Nβ readNregisters.--binaryβ output binary values.--decodeβ decode registers. By default it only uses the raw offsets, unless it's a command that would otherwise not work without it, or another option forces it enabled. Peep COMMANDS below for the details π.--allβ decode registers for all known platforms. This option implies--decode.--mmio=FILEβ use MMIO bar fromFILE.--devid=DEVIDβ pretend to be PCI IDDEVID. Useful with MMIO bar snapshots from other machines.--pci-slot <domain>:<bus>:<device>[.<func>]β find Intel GPU by PCI slot. Useful with multi-GPU hardware.--spec=PATHβ read register spec from directory or file specified byPATH; see REGISTER SPEC DEFINITIONS below for details. This option implies--decode.--helpβ show brief help.
π₯ COMMANDS π₯
See REGISTER REFERENCES below on how to describe registers for the commands π.
π¦ read [--count=N] REGISTER [...]
Dump each specified REGISTER, or N registers starting from each REGISTER.
π write REGISTER VALUE [REGISTER VALUE ...]
Write each VALUE to corresponding REGISTER.
π§ dump [--mmio=FILE --devid=DEVID]
Dump all registers specified in the register spec. The option --decode is implicitly enabled.
π decode REGISTER VALUE
Decode REGISTER VALUE. The option --decode is implicitly enabled.
β list
List the known registers. The option --decode is implicitly enabled.
π help
Display brief help.
π REGISTER REFERENCES π
Registers are defined as:
[(PORTNAME|PORTNUM|ENGINE|MMIO-OFFSET):](REGNAME|REGADDR)
π PORTNAME
The register access method, most often MMIO, which is the default. The methods supported on all platforms are "mmio", "portio-vga", and "mmio-vga".
On BYT and CHV, the sideband ports bunit, punit, nc, dpio, gpio-nc, cck, ccu, dpio2, and flisdsi are also supported.
πΈ PORTNUM
Port number for the sideband ports supported on BYT and CHV. Only numbers mapped to the supported ports are allowed, arbitrary numbers are not accepted.
Numbers above 0xff are automatically interpreted as MMIO offsets, not port numbers.
π ENGINE
Instead of cpu based MMIO, specified engine can be used for access method. Batchbuffer will be targeted for the engine to do read/write. The list of available engines is architecture specific and can be found with intel_reg help. Prefixing engine name with - uses non-privileged batchbuffer for access.
π MMIO-OFFSET
Use MMIO, and add this offset to the register address.
Numbers equal to or below 0xff are automatically interpreted as port numbers, not MMIO offsets.
π«Ά REGNAME
Name of the register as defined in the register spec.
If MMIO offset is not specified, it is picked up from the register spec. However, ports are not; the port is a namespace for the register names.
β¨ REGADDR
Register address. The corresponding register name need not be specified in the register spec.
πΏ ENVIRONMENT πΏ
INTEL_REG_SPECβ path to a directory or a file containing register spec definitions.
π§ REGISTER SPEC DEFINITIONS π§
A register spec associates register names with addresses. The spec is searched for in this order:
- Directory or file specified by the
--specoption. - Directory or file specified by the
INTEL_REG_SPECenvironment variable. - Builtin register spec. Also used as fallback with a warning if the above are used but fail.
If a directory is specified using --spec option or INTEL_REG_SPEC environment variable, the directory is scanned for a spec file in this order:
- File named after the PCI device id. For example,
"0412". - File named after the code name in lowercase, without punctuation. For example,
"valleyview". - File named after generation. For example,
"gen7"(note that this matches valleyview, ivybridge and haswell!).
π¦ Register Spec File Format π¦
The register spec format is briefly described below:
- Empty lines and lines beginning with
#,;, or//are ignored. - Lines not beginning with
(are interpreted as file names, absolute or relative, to be included. - Lines beginning with
(are interpreted as register definitions.
Registers are defined as tuples ('REGNAME', 'REGADDR', 'PORTNAME|PORTNUM|MMIO-OFFSET'), as in REGISTER REFERENCES above. The port description may also be an empty string to denote MMIO.
Examples:
# this is a comment, below is an includevlv_pipe_a.txt('GEN6_PMINTRMSK', '0x0000a168', '')('MIPIA_PORT_CTRL', '0x61190', '0x180000')('PLL1_DW0', '0x8000', 'DPIO')
π BUGS π
β οΈ Reading some registers may hang the GPU or the machine. Like, for real, be careful bestie π.
π REPORTING BUGS π
Report bugs on fd.o GitLab: <https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/issues>
π Author π
Jani Nikula <jani.nikula@intel.com>
π Copyright π
2015-2025 Intel Corporation
okay that's the whole manual, bestie π it's from igt-gpu-tools 2.6, dated 2016-03-01, and this is intel_reg(1) signing off π«Άβ¨
π¦ where this page comes from
- arch rolling: intel-gpu-tools 2.6-1 Β· MIT
- nixpkgs unstable: intel-gpu-tools 2.6
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms