xe_guc_pc_ap...h_freq_limit(9)
β¨ NAME β¨
xe_guc_pc_apply_flush_freq_limit β bestie, this is the one that caps your max GT freq while the L2 flush is happening π
(also hiiii, welcome to the Kernel API Manual β yes that's the manual name, we're being fancy today π)
πΈ SYNOPSIS πΈ
void xe_guc_pc_apply_flush_freq_limit (struct xe_guc_pc *pc );
That's it. One function, one pointer, zero drama. Slay.
π ARGUMENTS π
pcβ thexe_guc_pcobject π«Ά that's the whole vibe, literally just hand it the pc thing and you're done
π DESCRIPTION π
okay so, as per the WA π β we reduce the max GT frequency during the L2 cache flush. That's it, that's the whole function. It's giving "small but important" energy, no cap π§
π¦ SEE ALSO π¦
Kernel file ./drivers/gpu/drm/xe/xe_guc_pc.c β go read it, it's iconic π₯
GuC Power Conservation (PC)(9)xe_guc_pc_action_set_param(9)xe_guc_pc_action_unset_param(9)xe_guc_pc_get_act_freq(9)xe_guc_pc_get_cur_freq_fw(9)xe_guc_pc_get_cur_freq(9)xe_guc_pc_get_rp0_freq(9)xe_guc_pc_get_rpa_freq(9)xe_guc_pc_get_rpe_freq(9)xe_guc_pc_get_rpn_freq(9)xe_guc_pc_get_min_freq(9)xe_guc_pc_set_min_freq(9)xe_guc_pc_get_max_freq(9)xe_guc_pc_set_max_freq(9)xe_guc_pc_c_status(9)xe_guc_pc_rc6_residency(9)xe_guc_pc_mc6_residency(9)xe_guc_pc_raise_unslice(9)xe_guc_pc_init_early(9)xe_guc_pc_remove_flush_freq_limit(9)xe_guc_pc_restore_stashed_freq(9)xe_guc_pc_start(9)xe_guc_pc_stop(9)xe_guc_pc_fini_hw(9)xe_guc_pc_init(9)xe_guc_pc_print(9)
okay that's the whole page bestie, go forth and flush your L2 responsibly π
signed, sealed, delivered from <code>./drivers/gpu/drm/xe</code> β dated October 2026, filed under <code>xe_guc_pc_ap...h_freq_limit(9)</code> πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms