UNION EMU_WD_INT_ENA_W1S(9)

💖 union emu_wd_int_ena_w1s(9) — Kernel API Manual 💖

Ok bestie, yes: the manual name is Kernel API Manual, the page title is union emu_wd_int_ena_w1s(9), and we are about to give every bitfield its main-character moment. 💅

🌸 NAME 🌸

union emu_wd_int_ena_w1s — EMU Interrupt Enable Registers. That’s the whole name, no cap. This is the Kernel API Manual entry, and it’s giving union-register realness. 🎀

✨ SYNOPSIS ✨

       union emu_wd_int_ena_w1s {
           u64 value;
           struct {
         #if (defined(__BIG_ENDIAN_BITFIELD));
             u64 raz2 : 12;
             u64 ae_wd : 20;
             u64 raz1 : 16;
             u64 se_wd : 16;
         #else;
             u64 se_wd : 16;
             u64 raz1 : 16;
             u64 ae_wd : 20;
             u64 raz2 : 12;
         #endif;
           } s;
        };

So there’s a u64 value, and there’s a struct named s. The bitfield order is literally doing a little outfit change depending on __BIG_ENDIAN_BITFIELD:

• Big-endian branch: raz2 : 12, ae_wd : 20, raz1 : 16, se_wd : 16.
• Otherwise branch: se_wd : 16, raz1 : 16, ae_wd : 20, raz2 : 12.

Not me obsessing over a conditional bitfield layout, but here we are. 🦋

🫶 Members 🫶

Bestie, this section is literally empty in the original — zero member descriptions listed here. The members are doing their thing up in the synopsis. 🙈

🔥 SEE ALSO 🔥

Kernel file: ./drivers/crypto/cavium/nitrox/nitrox_csr.h

• union ucd_core_eid_ucode_block_num(9)
• union aqm_grp_execmsk_lo(9)
• union aqm_grp_execmsk_hi(9)
• union aqmq_drbl(9)
• union aqmq_qsz(9)
• union aqmq_cmp_thr(9)
• union aqmq_cmp_cnt(9)
• union aqmq_en(9)
• union aqmq_activity_stat(9)
• union emu_fuse_map(9)
• union emu_se_enable(9)
• union emu_ae_enable(9)
• union emu_ge_int_ena_w1s(9)
• union nps_pkt_slc_ctl(9)
• union nps_pkt_slc_cnts(9)
• union nps_pkt_slc_int_levels(9)
• union nps_pkt_in_done_cnts(9)
• union nps_pkt_in_instr_ctl(9)
• union nps_pkt_in_instr_rsize(9)
• union nps_pkt_in_instr_baoff_dbell(9)
• union nps_core_int_ena_w1s(9)
• union nps_core_gbl_vfcfg(9)
• union nps_core_int_active(9)
• union efl_core_int(9)
• union efl_core_int_ena_w1s(9)
• union efl_rnm_ctl_status(9)
• union bmi_ctl(9)
• union bmi_int_ena_w1s(9)
• union bmo_ctl2(9)
• union pom_int_ena_w1s(9)
• union lbc_inval_ctl(9)
• union lbc_int_ena_w1s(9)
• union lbc_int(9)
• union lbc_inval_status(9)
• union rst_boot(9)
• union fus_dat1(9)

Cute little sign-off, bestie: source/version is ./drivers/crypto/cavium/nitrox, the date is October 2026, and the page is union emu_wd_int_ena_w1s(9). Go off and read those registers 💖✨