UNION BMI_INT_ENA_W1S(9)

🌸 union bmi_int_ena_w1s(9) — bestie edition 🌸

okay so this is a page from the Kernel API Manual (section 9, the kernel-api girlies) and it's all about one very specific little thing: the union bmi_int_ena_w1s — aka the BMI interrupt enable set register. yes that's the whole vibe. it's a register. it's a union. she enables interrupts. we stan. 💅

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✨ NAME ✨

union bmi_int_ena_w1s — literally just the BMI interrupt enable set register, no cap. that's her whole job description. 🎀

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🦋 SYNOPSIS 🦋

here's the whole struct, copied character for character because we do not play with register layouts, bestie:

union bmi_int_ena_w1s {
    u64 value;
    struct {
  #if (defined(__BIG_ENDIAN_BITFIELD));
      u64 raz_13_63   : 51;
      u64 ilk_req_oflw : 1;
      u64 nps_req_oflw : 1;
      u64 raz_10 : 1;
      u64 raz_9 : 1;
      u64 fpf_undrrn  : 1;
      u64 eop_err_ilk : 1;
      u64 eop_err_nps : 1;
      u64 sop_err_ilk : 1;
      u64 sop_err_nps : 1;
      u64 pkt_rcv_err_ilk : 1;
      u64 pkt_rcv_err_nps : 1;
      u64 max_len_err_ilk : 1;
      u64 max_len_err_nps : 1;
  #else;
      u64 max_len_err_nps : 1;
      u64 max_len_err_ilk : 1;
      u64 pkt_rcv_err_nps : 1;
      u64 pkt_rcv_err_ilk : 1;
      u64 sop_err_nps : 1;
      u64 sop_err_ilk : 1;
      u64 eop_err_nps : 1;
      u64 eop_err_ilk : 1;
      u64 fpf_undrrn  : 1;
      u64 raz_9 : 1;
      u64 raz_10 : 1;
      u64 nps_req_oflw : 1;
      u64 ilk_req_oflw : 1;
      u64 raz_13_63 : 51;
  #endif;
    } s;
 };

quick vibe check on what you're looking at 👀:

• u64 value; — the raw 64-bit value, the whole register in one go, main character energy.
• struct { ... } s; — the bitfield view, where every field is : 1 (a single bit) except the big : 51 ones.
• #if (defined(__BIG_ENDIAN_BITFIELD)); — so the field order flips depending on endianness. big endian goes top-to-bottom starting with raz_13_63, and #else; (little endian fr fr) goes to the other branch where it starts with max_len_err_nps and ends with raz_13_63 last. the fields mirror each other exactly, just reversed. iconic honestly. ✨

the fields, in big-endian order, because that's how they're written up there:

• raz_13_63 : 51 bits 🫶
• ilk_req_oflw : 1
• nps_req_oflw : 1
• raz_10 : 1
• raz_9 : 1
• fpf_undrrn : 1
• eop_err_ilk : 1
• eop_err_nps : 1
• sop_err_ilk : 1
• sop_err_nps : 1
• pkt_rcv_err_ilk : 1
• pkt_rcv_err_nps : 1
• max_len_err_ilk : 1
• max_len_err_nps : 1

and in the #else; (little-endian) branch, the same fields appear in exactly the reverse order — max_len_err_nps first, raz_13_63 : 51 last. 🧚

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💜 Members 💜

this section is here, it exists, and it's… empty. that's it. that's the section. no members listed, no members invented, we're respecting the source. 🙈 (the fields live in the struct { ... } s; up in the synopsis, if you're looking for them, bestie.)

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🌈 SEE ALSO 🌈

this page is in the kernel file ./drivers/crypto/cavium/nitrox/nitrox_csr.h, and it keeps so much company. here's the whole mutuals list, every single one, no skips:

• union ucd_core_eid_ucode_block_num(9)
• union aqm_grp_execmsk_lo(9)
• union aqm_grp_execmsk_hi(9)
• union aqmq_drbl(9)
• union aqmq_qsz(9)
• union aqmq_cmp_thr(9)
• union aqmq_cmp_cnt(9)
• union aqmq_en(9)
• union aqmq_activity_stat(9)
• union emu_fuse_map(9)
• union emu_se_enable(9)
• union emu_ae_enable(9)
• union emu_wd_int_ena_w1s(9)
• union emu_ge_int_ena_w1s(9)
• union nps_pkt_slc_ctl(9)
• union nps_pkt_slc_cnts(9)
• union nps_pkt_slc_int_levels(9)
• union nps_pkt_in_done_cnts(9)
• union nps_pkt_in_instr_ctl(9)
• union nps_pkt_in_instr_rsize(9)
• union nps_pkt_in_instr_baoff_dbell(9)
• union nps_core_int_ena_w1s(9)
• union nps_core_gbl_vfcfg(9)
• union nps_core_int_active(9)
• union efl_core_int(9)
• union efl_core_int_ena_w1s(9)
• union efl_rnm_ctl_status(9)
• union bmi_ctl(9)
• union bmo_ctl2(9)
• union pom_int_ena_w1s(9)
• union lbc_inval_ctl(9)
• union lbc_int_ena_w1s(9)
• union lbc_int(9)
• union lbc_inval_status(9)
• union rst_boot(9)
• union fus_dat1(9)

heads up bestie: that's the list exactly as it was handed to me — nothing added, nothing dropped. if you need one of these, go read her page, not this one. 🫶

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and that's the whole page!! this came out of ./drivers/crypto/cavium/nitrox, dated October 2026, and honestly? she ate. go forth and enable those interrupts responsibly. periodt. 💖✨🎀