STRUCT XI3C_MASTER(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– struct xi3c_master(9) β€” Kernel API Manual πŸ’–

okay bestie, welcome to the struct xi3c_master(9) page β€” this is literally the state of an I3C master controller, and we're gonna read it together like a group chat. no cap, every field matters. 🫢


🌈 NAME 🌈

struct xi3c_master β€” I3C master controller state.


✨ SYNOPSIS ✨

here's the struct in all its iconic glory:

struct xi3c_master {
    struct i3c_master_controller base;
    struct device *dev;
    void __iomem *membase;
    struct clk *pclk;
    struct mutex lock;
    struct {
      u8 addrs[XI3C_MAX_DEVS];
      u8 index;
    } daa;
 };

πŸŽ€ Members πŸŽ€

  • base β€” I3C master controller embedded by the framework. it's giving main character energy inside the framework πŸ’…
  • dev β€” Pointer to the backing device structure.
  • membase β€” Memory base of the HW registers.
  • pclk β€” Input clock driving the controller.
  • lock β€” Serializes transfers and CCC submission.
  • daa β€” ENTDAA enumeration state. enumeration era ✨
  • daa.addrs β€” Dynamic addresses assigned in enumeration order.
  • daa.index β€” Number of responders enumerated so far.

πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file ./drivers/i3c/master/amd-i3c-master.c β€” go read it, bestie, it's right there πŸ‘‘


source/version check: this page comes from ./drivers/i3c/master, dated October 2026 β€” byeee, slay responsibly πŸ’–πŸŽ€

πŸ“¦ where this page comes from