STRUCT XGENE_DMA_CHAN(9)
πΈ struct xgene_dma_chan β NAME πΈ
okay so bestie, gather round: struct xgene_dma_chan is the internal representation of an X-Gene DMA channel π
that's it, that's the whole vibe. it's the little homegirl that keeps track of everything a single DMA channel is doing. icon behavior only β¨
π¦ SYNOPSIS
struct xgene_dma_chan {
struct dma_chan dma_chan;
struct xgene_dma *pdma;
struct device *dev;
int id;
int rx_irq;
char name[10];
spinlock_t lock;
int pending;
int max_outstanding;
struct list_head ld_pending;
struct list_head ld_running;
struct list_head ld_completed;
struct dma_pool *desc_pool;
struct tasklet_struct tasklet;
struct xgene_dma_ring tx_ring;
struct xgene_dma_ring rx_ring;
};
like, copy it exactly pls, no edits, no "improvements", we don't do that here π
π Members π
dma_chanβ thedmaenginechannel object member. this is the whole reason she's here honestly πpdmaβ a reference to the X-Gene DMA device structure. her upstream bestie π«Άdevβ thestruct devicereference used for the dma mapping api.idβ the raw id of this channel. her literal government name, no filter πrx_irqβ the channel IRQ. that's how she gets pinged, iykyk πnameβ the name of the X-Gene DMA channel.lockβ serializes enqueue/dequeue operations to the descriptor pool. one at a time, bestie, no cutting in line π¦pendingβ the number of transaction requests pushed to the DMA controller for execution, but still waiting for completion. so likeβ¦ they're out there, they're just not back yet πmax_outstandingβ the max number of outstanding requests we can push to the channel. the hard limit, the ceiling, the no more after this βld_pendingβ descriptors which are queued to run, but have not yet been submitted to the hardware for execution. they're in the group chat but haven't sent a message yet π¬ld_runningβ descriptors which are currently being executed by the hardware. main character energy, they're literally on stage rn π₯ld_completedβ descriptors which have finished execution by the hardware. these descriptors have already had their cleanup actions run. they are waiting for the ACK bit to be set by the async tx API. so likeβ¦ done with their shift, just waiting for someone to clock them out β°desc_poolβ the descriptor pool for DMA operations. the closet she pulls fits from πtaskletβ the bottom half where all completed descriptors get cleaned. the little cleanup crew that shows up after the party π§Ήtx_ringβ the transmit ring descriptor that we use to prepare actual descriptors for further executions. the outbox, basically πrx_ringβ the receive ring descriptor that we use to get completed DMA descriptors during cleanup time. the inbox where finished stuff comes back π
β¨ SEE ALSO β¨
- Kernel file
./drivers/dma/xgene-dma.c struct xgene_dma(9)xgene_dma_clean_completed_descriptor(9)xgene_dma_run_tx_complete_actions(9)xgene_dma_clean_running_descriptor(9)xgene_chan_xfer_ld_pending(9)xgene_dma_cleanup_descriptors(9)xgene_dma_free_desc_list(9)
ngl if you got here you're probably deep in driver land β go read those, they're all part of the same friend group π«Ά
and that's the whole page bestie, no cap π this one lives under ./drivers/dma in the Kernel API Manual and it's dated October 2026 β love that for us, periodt ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms