STRUCT XE_TLB_INVAL_BATCH(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

okay bestie, welcome to the Kernel API Manual β€” this is the page for struct xe_tlb_inval_batch, and it's literally described as Batch of TLB invalidation fences. slay. πŸŽ€

✨ SYNOPSIS ✨

here's the struct in all its glory, no edits, no cap:

struct xe_tlb_inval_batch {
    struct xe_tlb_inval_fence fence[XE_MAX_TILES_PER_DEVICE *
XE_MAX_GT_PER_TILE];
    unsigned int num_fences;
 };

🫢 Members 🫢

two members, both doing their thing:

  • fence β€” per-GT TLB invalidation fences
  • num_fences β€” number of valid entries in fence

πŸ’– Description πŸ’–

so this struct holds one fence per GT that's covered by a TLB invalidation request. that's the whole vibe: a batch of TLB invalidation fences, all chillin' together. no extra lore, periodt. 🌸

πŸ”₯ SEE ALSO πŸ”₯

go peek at these if you're doing your homework, bestie:

  • Kernel file ./drivers/gpu/drm/xe/xe_tlb_inval_types.h
  • struct xe_tlb_inval_fence(9)

mwah πŸ’‹ β€” source/version: ./drivers/gpu/drm/xe, date: October 2026, page: struct xe_tlb_inval_batch(9). byeee 🫢✨

πŸ“¦ where this page comes from