STRUCT XE_MEM_POOL(9)
β¨ struct xe_mem_pool(9) β¨
okay bestie, welcome to the Kernel API Manual page for struct xe_mem_pool β literally the DRM MM pool for sub-allocating memory from a BO on an XE tile π
πΈ NAME πΈ
struct xe_mem_pool β DRM MM pool for sub-allocating memory from a BO on an XE tile. no cap, that's the whole vibe π«Ά
π SYNOPSIS π
struct xe_mem_pool {
struct drm_mm base;
struct xe_bo *bo;
struct xe_bo *shadow;
struct mutex swap_guard;
void *cpu_addr;
bool is_iomem;
};
π¦ Members π¦
baseβ Range allocator over[0, size)in bytes. she's giving range-manager main character energy β¨boβ Active pool BO (GGTT-pinned, CPU-mapped). iconic, pinned, and mapped πshadowβ Shadow BO for atomic command updates. lowkey the understudy that still slays πswap_guardβ Timeline guard updatingboandshadow. protecting the swap, fr fr π‘οΈcpu_addrβ CPU virtual address of the active BO. the CPU-side address bestie πis_iomemβ Indicates if the BO mapping is I/O memory. yes, that kind of memory π
π Description π
The XE memory pool is a DRM MM manager that provides sub-allocation of memory from a backing buffer object (BO) on a specific XE tile. It is designed to manage memory for GPU workloads, allowing for efficient allocation and deallocation of memory regions within the BO. periodt π«
The memory pool maintains a primary BO that is pinned in the GGTT and mapped into the CPU address space for direct access. Optionally, it can also maintain a shadow BO that can be used for atomic updates to the primary BO's contents. okay versatile queen π
The API provided by the memory pool allows clients to allocate and free memory regions, retrieve GPU and CPU addresses, and synchronize data between the primary and shadow BOs as needed. literally all the essentials, no notes π₯
β SEE ALSO β
Kernel file ./drivers/gpu/drm/xe/xe_mem_pool.c
xe_mem_pool_init(9)xe_mem_pool_sync(9)xe_mem_pool_swap_shadow_locked(9)xe_mem_pool_sync_shadow_locked(9)xe_mem_pool_gpu_addr(9)xe_mem_pool_cpu_addr(9)xe_mem_pool_bo_swap_guard(9)xe_mem_pool_bo_flush_write(9)xe_mem_pool_bo_sync_read(9)xe_mem_pool_alloc_node(9)xe_mem_pool_insert_node(9)xe_mem_pool_free_node(9)xe_mem_pool_node_cpu_addr(9)xe_mem_pool_dump(9)
and that's the page, bestie π shoutout to the source/version path ./drivers/gpu/drm/xe and the date October 2026 β cute sign-off, mwah π«Άβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms