STRUCT XE_HW_FENCE_CTX(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct xe_hw_fence_ctx β€” hardware fence context ✨

Okay bestie, so this is page struct xe_hw_fence_ctx(9) from the Kernel API Manual, and we're about to get so into it πŸ’… it's giving "small struct, big responsibilities" and honestly? iconic.


πŸŽ€ NAME πŸŽ€

struct xe_hw_fence_ctx β€” the hardware fence context, aka the lil bookkeeping buddy that keeps your hardware fences in line πŸ¦‹


🌸 SYNOPSIS 🌸

struct xe_hw_fence_ctx {
    struct xe_gt *gt;
    struct xe_hw_fence_irq *irq;
    u64 dma_fence_ctx;
    u32 next_seqno;
    char name[MAX_FENCE_NAME_LEN];
 };

Like look at her. Five fields. Zero notes. main character energy fr fr πŸ‘‘


πŸ’– Members πŸ’–

  • gt β€” the GT structure of the hardware fence context. Yeah, that GT. Your girl's home base 🏠
  • irq β€” the fence irq handler. This is who gets pinged when interrupt business goes down πŸ””
  • dma_fence_ctx β€” the dma fence context for the hardware fence. It's a u64, it's important, ngl it's kind of the whole point ✨
  • next_seqno β€” the next seqno for the hardware fence. A u32 that is literally the next number in line, keeping everything serialized and cute πŸŽ€
  • name β€” name of the hardware fence context, chillin' in a char array of size MAX_FENCE_NAME_LEN. Every queen needs a nameplate πŸ’…

πŸ”₯ Description πŸ”₯

So the context for a hardware fence β€” that's the vibe. It has a 1 to 1 relationship with xe_engine (no sharing, no situationships, one engine per context, periodt 🫢).

It points to a xe_hw_fence_irq, and it maintains serial seqno. That's it, that's the job. Lowkey simple, highkey essential 😭


🌈 SEE ALSO 🌈

  • Kernel file ./drivers/gpu/drm/xe/xe_hw_fence_types.h
  • struct xe_hw_fence_irq(9)
  • struct xe_hw_fence(9)

Go read those next bestie, iykyk πŸ‘‘


Also quick heads up: the whole struct block above is verbatim, don't go reformatting it, my love β€” the closing brace has a lil extra space in front of it and we respect her πŸ™ˆ

Okay that's the page!! This one lives at ./drivers/gpu/drm/xe (the kernel source tree sweetie), dated October 2026, and it's struct xe_hw_fence_ctx(9) both at the top and at the very bottom where the footer chills. Slay, done, mwah πŸ’œπŸ§šπŸ“

πŸ“¦ where this page comes from