STRUCT XE_HW_ENGINE(9)

💅 struct xe_hw_engine(9) — like, the whole Kernel API Manual moment ✨

okay bestie, buckle up 🎀 this is the page for struct xe_hw_engine, straight out of the Kernel API Manual, and it's literally the blueprint for a hardware engine. no cap, every field here matters, so let's go 🫶

---

🌸 NAME 🌸

struct xe_hw_engine — Hardware engine. that's it, that's the vibe 💖

---

✨ SYNOPSIS ✨

struct xe_hw_engine {
    struct xe_gt *gt;
    const char *name;
    enum xe_engine_class class;
    u16 instance;
    u16 logical_instance;
    u16 irq_offset;
    u16 irq_page;
    u32 mmio_base;
    struct xe_reg_sr reg_sr;
    struct xe_reg_sr reg_whitelist;
    struct xe_reg_sr oa_whitelist;
    struct xe_reg_sr oa_sr;
    struct xe_reg_sr reg_lrc;
    enum xe_force_wake_domains domain;
    struct xe_bo *hwsp;
    struct xe_execlist_port *exl_port;
    struct xe_hw_fence_irq *fence_irq;
    void (*irq_handler)(struct xe_hw_engine *hwe, u16 intr_vec);
    enum xe_hw_engine_id engine_id;
    struct xe_hw_engine_class_intf *eclass;
    struct xe_oa_unit *oa_unit;
    struct xe_hw_engine_group *hw_engine_group;
 };

look at her. iconic struct, zero notes 👑

---

🦋 Members 🦋

• gt — the GT structure this hw engine belongs to. like, who's her home base 🏠
• name — name of this hw engine 💫
• class — class of this hw engine
• instance — physical instance of this hw engine
• logical_instance — logical instance of this hw engine.

⚠️ Note: for GuC usage, always use xe_hwe_guc_logical_instance. for GuC usage, we should no longer use the raw logical instance. read that twice bestie, it's giving important 🙈

• irq_offset — IRQ offset of this hw engine
• irq_page — MEMIRQ page used by this HW engine
• mmio_base — MMIO base address of this hw engine
• reg_sr — table with registers to be restored on GT init/resume/reset 🔁
• reg_whitelist — table with registers to be whitelisted
• oa_whitelist — oa registers to be whitelisted
• oa_sr — oa nonpriv whitelist registers, changed on oa stream open/close
• reg_lrc — LRC workaround registers
• domain — force wake domain of this hw engine
• hwsp — hardware status page buffer object
• exl_port — execlists port
• fence_irq — fence IRQ to run when a hw engine IRQ is received
• irq_handler — IRQ handler to run when hw engine IRQ is received ⚡
• engine_id — id for this hw engine
• eclass — pointer to per hw engine class interface
• oa_unit — oa unit for this hw engine
• hw_engine_group — the group of hw engines this one belongs to 🫂

---

👑 Description 👑

contains all the hardware engine state for physical instances. that's the whole thought. main character energy fr fr 💜

---

🌈 SEE ALSO 🌈

• Kernel file ./drivers/gpu/drm/xe/xe_hw_engine_types.h
• struct xe_hw_engine_class_intf(9)
• struct xe_hw_engine_snapshot(9)

go read those next, iykyk 📚✨

---

and that's the page, bestie 🎀 it lives in ./drivers/gpu/drm/xe, dated October 2026, and it's literally titled struct xe_hw_engine(9). slay, go forth and engine 🧚💖🔥