STRUCT XE_DEVICE(9)
π struct xe_device (9) β Kernel API Manual π
okay bestie, welcome to the top-level struct of the Xe device β¨ this is the big one, the main character energy struct, the one everything else lives inside. buckle up, we're going through every single member. no skimming. π
πΈ NAME πΈ
struct xe_device β literally the top level struct of the Xe device, the whole entire vibe of your GPU in one C struct π«Ά
β¨ SYNOPSIS β¨
struct xe_device {
struct drm_device drm;
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY);
struct intel_display *display;
#endif;
struct xe_devcoredump devcoredump;
struct intel_device_info {
const char *platform_name;
const char *graphics_name;
const char *media_name;
u32 graphics_verx100;
u32 media_verx100;
u32 mem_region_mask;
enum xe_platform platform;
enum xe_subplatform subplatform;
u16 devid;
u8 revid;
struct xe_step_info step;
u8 dma_mask_size;
u8 vram_flags;
u8 tile_count;
u8 max_gt_per_tile;
u8 multi_lrc_mask;
u8 gt_count;
u8 vm_max_level;
u8 va_bits;
u8 has_access_counter:1;
u8 has_asid:1;
u8 has_atomic_enable_pte_bit:1;
u8 has_cached_pt:1;
u8 has_device_atomics_on_smem:1;
u8 has_drm_ras:1;
u8 has_fan_control:1;
u8 has_flat_ccs:1;
u8 has_gsc_nvm:1;
u8 has_heci_cscfi:1;
u8 has_heci_gscfi:1;
u8 has_i2c:1;
u8 has_late_bind:1;
u8 has_llc:1;
u8 has_mbx_power_limits:1;
u8 has_mbx_thermal_info:1;
u8 has_mem_copy_instr:1;
u8 has_mert:1;
u8 has_page_reclaim_hw_assist:1;
u8 has_pre_prod_wa:1;
u8 has_pxp:1;
u8 has_ctx_tlb_inval:1;
u8 has_range_tlb_inval:1;
u8 has_soc_remapper_sysctrl:1;
u8 has_soc_remapper_telem:1;
u8 has_sriov:1;
u8 has_sysctrl:1;
u8 has_usm:1;
u8 has_64bit_timestamp:1;
u8 is_dgfx:1;
u8 needs_scratch:1;
u8 probe_display:1;
u8 skip_guc_pc:1;
u8 skip_pcode:1;
u8 needs_shared_vf_gt_wq:1;
} info;
struct {
unsigned long *oob;
bool oob_initialized;
} wa_active;
struct xe_survivability survivability;
struct {
spinlock_t lock;
atomic_t enabled;
struct {
u16 nvec;
struct xarray indexes;
} msix;
} irq;
struct ttm_device ttm;
struct {
size_t size;
void __iomem *regs;
} mmio;
struct {
struct xe_vram_region *vram;
struct ttm_resource_manager sys_mgr;
struct xe_shrinker *shrinker;
struct xe_ttm_stolen_mgr *stolen_mgr;
} mem;
struct {
enum xe_sriov_mode __mode;
union {
struct xe_device_pf pf;
struct xe_device_vf vf;
};
struct workqueue_struct *wq;
} sriov;
struct {
struct xarray asid_to_vm;
u32 next_asid;
struct rw_semaphore lock;
struct workqueue_struct *pf_wq;
#define XE_PAGEFAULT_QUEUE_COUNT 4;
struct xe_pagefault_queue pf_queue[XE_PAGEFAULT_QUEUE_COUNT];
#if IS_ENABLED(CONFIG_DRM_XE_PAGEMAP);
struct drm_pagemap_shrinker *dpagemap_shrinker;
#endif;
} usm;
struct {
spinlock_t lock;
struct {
struct list_head kernel_bo_present;
struct list_head evicted;
} early;
struct {
struct list_head kernel_bo_present;
struct list_head evicted;
struct list_head external;
} late;
} pinned;
wait_queue_head_t ufence_wq;
struct workqueue_struct *preempt_fence_wq;
struct workqueue_struct *ordered_wq;
struct workqueue_struct *unordered_wq;
struct workqueue_struct *destroy_wq;
struct xe_tile tiles[XE_MAX_TILES_PER_DEVICE];
struct {
struct {
struct mutex lock;
struct list_head list;
} vram_userfault;
} mem_access;
struct {
const struct xe_pat_ops *ops;
const struct xe_pat_table_entry *table;
int n_entries;
const struct xe_pat_table_entry *pat_ats;
const struct xe_pat_table_entry *pat_primary_pta;
const struct xe_pat_table_entry *pat_media_pta;
const struct xe_pat_table_entry *pat_primary_tr_pta;
const struct xe_pat_table_entry *pat_media_tr_pta;
u16 idx[__XE_CACHE_LEVEL_COUNT];
} pat;
struct {
bool capable;
bool allowed;
u32 vram_threshold;
struct mutex lock;
} d3cold;
struct notifier_block pm_notifier;
struct completion pm_block;
struct list_head rebind_resume_list;
struct mutex rebind_resume_lock;
struct {
struct mutex lock;
} pmt;
struct {
spinlock_t lock;
void (*set_telem_region)(struct xe_device *xe, u32 index);
void (*set_sysctrl_region)(struct xe_device *xe, u32 index);
} soc_remapper;
struct task_struct *pm_callback_task;
struct xe_hwmon *hwmon;
struct xe_heci_gsc heci_gsc;
struct intel_dg_nvm_dev *nvm;
struct xe_late_bind late_bind;
#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE;
struct {
enum xe_page_size_alloc_ctrl_mode mode;
u32 cur_index;
struct mutex lock;
} page_size_alloc_ctrl;
#endif;
struct xe_oa oa;
struct xe_pxp *pxp;
bool needs_flr_on_fini;
atomic_t in_reset;
struct {
atomic_t flag;
enum xe_wedged_mode mode;
unsigned long method;
bool inconsistent_reset;
} wedged;
void *devres_group;
struct xe_bo_dev {
struct work_struct async_free;
struct llist_head async_list;
} bo_device;
struct xe_pmu pmu;
struct xe_drm_ras ras;
struct xe_i2c *i2c;
struct xe_sysctrl sc;
u32 atomic_svm_timeslice_ms;
u32 min_run_period_lr_ms;
u32 min_run_period_pf_ms;
#ifdef TEST_VM_OPS_ERROR;
u8 vm_inject_error_position;
#endif;
#if IS_ENABLED(CONFIG_TRACE_GPU_MEM);
atomic64_t global_total_pages;
#endif;
struct xe_validation_device val;
struct {
struct xe_bo *capture_obj[XE_MAX_TILES_PER_DEVICE + 1];
u8 region_mask;
} psmi;
#if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST);
u32 *g2g_test_array;
atomic_t g2g_test_count;
#endif;
};
π Members π
okay so now we go field by field, and yes, there are a LOT of them, but that's the whole point β no cap, every single one matters π
drmβ the actualdrmdevice. the foundation bestie, everything else sits on top of it.displayβ display device data π₯οΈ and here's the tea: it must be placed after thedrmdevice member. not optional. don't move it.devcoredumpβ device coredump. the receipts when things go sideways πinfoβ device info. the giant nested struct of everything this device is.
π info.* β the identity section π
info.platform_nameβ platform nameinfo.graphics_nameβ graphics IP nameinfo.media_nameβ media IP nameinfo.graphics_verx100β graphics IP versioninfo.media_verx100β media IP versioninfo.mem_region_maskβ mask of valid memory regionsinfo.platformβ Xe platform enuminfo.subplatformβ Xe subplatform enuminfo.devidβ device IDinfo.revidβ device revisioninfo.stepβ stepping information for each IPinfo.dma_mask_sizeβ DMA address bitsinfo.vram_flagsβ Vram flagsinfo.tile_countβ Number of tiles π§±info.max_gt_per_tileβ Number of GT IDs allocated to each tileinfo.multi_lrc_maskβ bitmask of engine classes which support multi-lrcinfo.gt_countβ Total number of GTs for entire deviceinfo.vm_max_levelβ Max VM levelinfo.va_bitsβ Maximum bits of a virtual address
π info.has_* β the giant feature checklist π
these are all single-bit flags, so think of it as the device's little "do I do this? π" list. slay.
info.has_access_counterβ Device supports access counterinfo.has_asidβ Has address space IDinfo.has_atomic_enable_pte_bitβ Device has atomic enable PTE bitinfo.has_cached_ptβ Supports caching pagetableinfo.has_device_atomics_on_smemβ Supports device atomics on SMEMinfo.has_drm_rasβ Device supportsdrm_ras(Reliability, Availability, Serviceability)info.has_fan_controlβ Device supports fan control πinfo.has_flat_ccsβ Whether flat CCS metadata is usedinfo.has_gsc_nvmβ Device has gsc non-volatile memoryinfo.has_heci_cscfiβ device hasheci cscfiinfo.has_heci_gscfiβ device hasheci gscfiinfo.has_i2cβ Device has I2C controllerinfo.has_late_bindβ Device has firmware late binding supportinfo.has_llcβ Device has a shared CPU+GPU last level cacheinfo.has_mbx_thermal_infoβ Device supports thermal mailbox commands π‘οΈinfo.has_mem_copy_instrβ Device supportsMEM_COPYinstructioninfo.has_mertβ Device has standalone MERTinfo.has_page_reclaim_hw_assistβ Device supports page reclamation featureinfo.has_pre_prod_waβ Pre-production workarounds still present in driverinfo.has_pxpβ Device has PXP supportinfo.has_ctx_tlb_invalβ Has context based TLB invalidationsinfo.has_range_tlb_invalβ Has range based TLB invalidationsinfo.has_soc_remapper_sysctrlβ Has SoC remapper system controllerinfo.has_soc_remapper_telemβ Has SoC remapper telemetry supportinfo.has_sriovβ Supports SR-IOVinfo.has_sysctrlβ Supports System Controllerinfo.has_usmβ Device has unified shared memory supportinfo.has_64bit_timestampβ Device supports 64-bit timestamps β±οΈinfo.is_dgfxβ is discrete deviceinfo.needs_scratchβ needs scratch page for oob prefetch to workinfo.probe_displayβ Probe display hardware. If set to false, the driver will behave as if there is no display hardware present and will not try to read/write to it in any way. The display hardware, if it exists, will not be exposed to userspace and will be left untouched in whatever state the firmware or bootloader left it in. π (<- literally "we pretend it isn't there and we do not touch it")info.skip_guc_pcβ Skip GuC based PM feature initinfo.skip_pcodeβ skip access to PCODE uCinfo.needs_shared_vf_gt_wqβ needs shared GT WQ on VF
π«Ά wa_active β keeping the receipts π«Ά
wa_activeβ keep track of active workaroundswa_active.oobβ bitmap with active OOB workarounds
π and that's where part 1 lands β mid-struct, mid-vibe, exactly as the page was written. the rest is still coming, don't you dare close the tab π
wa_active.oob_initializedβ marks oob as initialized, and the whole point of that is helping detect misuse ofXE_DEVICE_WAβ lowkey it can only be called on initialization after the Device OOB WAs have been processed πsurvivabilityβ survivability information for device π«Ά
okay next up, the interrupt corner, it's giving very "don't touch my stuff" energy β¨
irqβ device interrupt stateirq.lockβ lock for processing irq's on this deviceirq.enabledβ interrupts enabled on this deviceirq.msixβ irq info for platforms that support MSI-Xirq.msix.nvecβ number of MSI-X interruptsirq.msix.indexesβ used to allocate MSI-X indexesttmβ ttm device
memory stuff, we love a memory moment π
mmioβ mmio info for devicemmio.sizeβ size of MMIO space for devicemmio.regsβ pointer to MMIO space for devicememβ memory info for devicemem.vramβ VRAM info for devicemem.sys_mgrβ system TTM managermem.shrinkerβ system memory shrinker.mem.stolen_mgrβ stolen memory manager.
sriovβ device level virtualization datasriov.__modeβ SR-IOV mode (don't access directly! seriously, hands off π){unnamed_union}β anonymoussriov.pfβ PF specific datasriov.vfβ VF specific datasriov.wqβ workqueue used by the virtualization workers
unified memory state, main character energy tbh π
usmβ unified memory stateusm.asid_to_vmβ convert an ASID to VMusm.next_asidβ next ASID, used to cyclical alloc asidsusm.lockβ protects UM stateusm.pf_wqβ page fault work queue, unbound, high priority π₯usm.pf_queueβ page fault queuesusm.dpagemap_shrinkerβ shrinker for unused pagemaps
pinned BOs, the way these are split into early and late is so organized of them π
pinnedβ pinned BO statepinned.lockβ protected pinned BO list statepinned.earlyβ early pinned listspinned.early.kernel_bo_presentβ pinned kernel BO that are presentpinned.early.evictedβ pinned BO that have been evictedpinned.lateβ late pinned listspinned.late.kernel_bo_presentβ pinned kernel BO that are presentpinned.late.evictedβ pinned BO that have been evictedpinned.late.externalβ pinned external and dma-buf.
a whole little family of workqueues, iykyk β
ufence_wqβ user fence wait queuepreempt_fence_wqβ used to serialize preempt fencesordered_wqβ used to serialize compute mode resumeunordered_wqβ used to serialize unordered workdestroy_wqβ used to serialize SVM pagemap destroy work
tilesβ device tilesmem_accessβ keep track of memory access in the device, possibly triggering additional actions when they occur.mem_access.vram_userfaultβ encapsulate vram_userfault related stuffmem_access.vram_userfault.lockβ protects access tomem_access.vram_userfault.list. Using mutex instead of spinlock as lock is applied to entire list operation which may sleep π΄mem_access.vram_userfault.listβ keep list of userfaulted vram bo, which require to release their mmap mappings at runtime suspend path
PAT time, and yes there are a lot of entries, we're listing them all bestie π
patβ encapsulate PAT related stuffpat.opsβ internal operations to abstract platformspat.tableβ PAT table to program in the HWpat.n_entriesβ number of PAT entriespat.pat_atsβ PAT entry for PCIe ATS responsespat.pat_primary_ptaβ primary GT PAT entry for page table accessespat.pat_media_ptaβ media GT PAT entry for page table accessespat.pat_primary_tr_ptaβ primary GT PAT entry for TRTT page table accessespat.pat_media_tr_ptaβ media GT PAT entry for TRTT page table accesses
d3cold corner βοΈ
d3coldβ encapsulate d3cold related stuffd3cold.capableβ indicates if root port is d3cold capabled3cold.allowedβ indicates if d3cold is a valid device stated3cold.vram_thresholdβ this represents the permissible threshold (in megabytes) for vram save/restore. d3cold will be disallowed, whenvram_usagesis above or equals the threshold value to avoid the vram save/restore latency. Default threshold value is300mb.d3cold.lockβ protectvram_threshold
pm_notifierβ our PM notifier to perform actions in response to various PM events.pm_blockβ completion to block validating tasks on suspend / hibernate preparerebind_resume_listβ list of wq items to kick on resume.rebind_resume_lockβ lock to protect therebind_resume_listpmtβ support the PMT driver callback interfacepmt.lockβ protect access for telemetry data
SoC remapper, say that five times fast π¦
soc_remapperβ SoC remapper objectsoc_remapper.lockβ serialize access to SoC Remapper's index registerssoc_remapper.set_telem_regionβ set telemetry indexsoc_remapper.set_sysctrl_regionβ set system controller index
pm_callback_taskβ track the active task that is running in either theruntime_suspendorruntime_resumecallbacks.hwmonβ hwmon subsystem integrationheci_gscβ graphics security controllernvmβ discrete graphics non-volatile memorylate_bindβ xe mei late bind interfacepage_size_alloc_ctrlβ user BO page-size allocation debug control statepage_size_alloc_ctrl.modeβ xe page size allocation control modepage_size_alloc_ctrl.cur_indexβ round-robin index used by mixed modepage_size_alloc_ctrl.lockβ protectsmodeandcur_indexoaβ oa observation subsystempxpβ encapsulate Protected Xe Path support
the "something went very wrong" section π₯
needs_flr_on_finiβ requests function-reset on finiin_resetβ indicates if device is in resetwedgedβ struct to control Wedged States and modewedged.flagβ Xe device faced a critical error and is now blocked. πwedged.modeβ mode controlled by kernel parameter and debugfswedged.methodβ recovery method to be sent in the drm device wedged ueventwedged.inconsistent_resetβ inconsistent reset policy state between GTs
devres_groupβ devres groupbo_deviceβ struct to control async free of BOsbo_device.async_freeβ free workerbo_device.async_listβ list of BOs to be freedpmuβ performance monitoring unitrasβ RAS structure for devicei2cβ I2C host controllerscβ System Controller
timing + debug bits, lil guys but important π
atomic_svm_timeslice_msβ atomic SVM fault timeslice MSmin_run_period_lr_msβ LR VM (preempt fence mode) timeslicemin_run_period_pf_msβ LR VM (page fault mode) timeslicevm_inject_error_positionβ inject errors at different places in VM bind IOCTL based on this valueglobal_total_pagesβ global GPU page usage tracked for gpu_mem tracepointsvalβ the domain for exhaustive eviction, which is currently per device.psmiβ GPU debugging via additional validation HWpsmi.capture_objβ PSMI buffer for VRAMpsmi.region_maskβ mask of valid memory regionsg2g_test_arrayβ for testing G2G communicationsg2g_test_countβ for testing G2G communications
π SEE ALSO π
- Kernel file
./drivers/gpu/drm/xe/xe_device_types.henum xe_wedged_mode(9),enum xe_page_size_alloc_ctrl_mode(9),struct xe_file(9)
go read those too bestie, they're literally right there and they slay π
and that's the whole struct, no cap π«Ά this lil page lives at ./drivers/gpu/drm/xe, dated October 2026, and it's officially titled struct xe_device(9) β mwah, bye β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms