STRUCT XCAN_PRIV(9)

📦 version 7.3.1, in nixpkgs unstable

✨ struct xcan_priv(9) ✨

okay bestie, so this is a Kernel API Manual page for struct xcan_priv — and like, the whole point of it is that this definition define CAN driver instance 💅 that's the vibe, that's the assignment. It's the little private clubhouse where one Xilinx CAN driver keeps all its stuff. Let's get into it 🎀

🌸 SYNOPSIS 🌸

Here's the whole struct, character for character, no cap — don't touch a single field:

struct xcan_priv {
    struct can_priv can;
    spinlock_t tx_lock;
    unsigned int tx_head;
    unsigned int tx_tail;
    unsigned int tx_max;
    struct napi_struct napi;
    u32 (*read_reg)(const struct xcan_priv *priv, enum xcan_reg reg);
    void (*write_reg)(const struct xcan_priv *priv, enum xcan_reg reg,
u32 val);
    struct device *dev;
    void __iomem *reg_base;
    unsigned long irq_flags;
    struct clk *bus_clk;
    struct clk *can_clk;
    struct xcan_devtype_data devtype;
    struct phy *transceiver;
    struct reset_control *rstc;
    bool ecc_enable;
    struct u64_stats_sync syncp;
    u64_stats_t ecc_rx_2_bit_errors;
    u64_stats_t ecc_rx_1_bit_errors;
    u64_stats_t ecc_txol_2_bit_errors;
    u64_stats_t ecc_txol_1_bit_errors;
    u64_stats_t ecc_txtl_2_bit_errors;
    u64_stats_t ecc_txtl_1_bit_errors;
 };

(yeah that u32 val); line is doing its own little thing, we love a quirky wrap 🙈)

🦋 Members 🦋

okay so member by member, and I'm gonna give you the actual tea for each one:

  • can — CAN private data structure. the whole CAN situation lives in here bestie ✨
  • tx_lock — Lock for synchronizing TX interrupt handling 🔒
  • tx_head — Tx CAN packets ready to send on the queue 📤
  • tx_tail — Tx CAN packets successfully sended on the queue 📥
  • tx_max — Maximum number packets the driver can send 🚦
  • napi — NAPI structure, iconic as always 👑
  • read_reg — For reading data from CAN registers 📖
  • write_reg — For writing data to CAN registers ✍️
  • dev — Network device data structure 💻
  • reg_base — Ioremapped address to registers 🗺️
  • irq_flags — For request_irq ⚡
  • bus_clk — Pointer to struct clk 🕰️
  • can_clk — Pointer to struct clk 🕰️ (yes, another one, she's got two clocks, main character energy)
  • devtype — Device type specific constants 🧬
  • transceiver — Optional pointer to associated CAN transceiver 📡
  • rstc — Pointer to reset control 🔄
  • ecc_enable — ECC enable flag 🚩
  • syncp — synchronization for ECC error stats 🧮
  • ecc_rx_2_bit_errors — RXFIFO 2bit ECC count 💀
  • ecc_rx_1_bit_errors — RXFIFO 1bit ECC count 😭
  • ecc_txol_2_bit_errors — TXOLFIFO 2bit ECC count 💀
  • ecc_txol_1_bit_errors — TXOLFIFO 1bit ECC count 😭
  • ecc_txtl_2_bit_errors — TXTLFIFO 2bit ECC count 💀
  • ecc_txtl_1_bit_errors — TXTLFIFO 1bit ECC count 😭
bestie note: those ECC counters are error counts, so if they're going up... vibe check failed, go look at your hardware 🫶

🌈 SEE ALSO 🌈

Kernel file ./drivers/net/can/xilinx_can.c — and like, literally the entire friend group:

anyway that's the whole page, go read the source, ily, bye 💖✨

signed, sealed, delivered: this came out of ./drivers/net/can, dated October 2026, and it's still called struct xcan_priv(9). periodt 🎀🦋💜
📦 where this page comes from