STRUCT WRPLL_CFG(9)

✨ struct wrpll_cfg(9) ✨

okay bestie, so this is a page from the Kernel API Manual and it's literally about struct wrpll_cfg — the WRPLL configuration values 💅 it's giving "tiny struct, big responsibilities" and honestly? iconic 🎀

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🌸 NAME 🌸

struct wrpll_cfg — WRPLL configuration values ✨

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🦋 SYNOPSIS 🦋

struct wrpll_cfg {
    u8 divr;
    u8 divq;
    u8 range;
    u8 flags;
    u16 divf;
 };

no cap, that's the whole thing 🙈

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💖 Members 💖

• divr — the reference divider value (6 bits), exactly as it gets presented to the PLL signals ✨
• divq — the output divider value (3 bits), again as presented to the PLL signals 🎀
• range — the PLL loop filter range. peek below for the deets 👀
• flags — the PLL configuration flags. also peek above for the deets 👀
• divf — the feedback divider value (9 bits), as presented to the PLL signals 💫

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👑 Description 👑

so divr, divq, divq, range are what the PLL expects to see on its input signals, fr fr. which means divr and divf are the actual divisors minus one — yes, minus one, don't come for me, that's just how it is 😭

and divq? that one's a power-of-two divider bestie. like, 1 = divide-by-2 and 6 = divide-by-64. and listen — 0 is an invalid divq value 💀 so don't do that.

when you're initially passing a struct wrpll_cfg record, that record should be zero-initialized with the exception of the flags field 🫶

the only flag bits that need to be set are either WRPLL_FLAGS_INT_FEEDBACK or WRPLL_FLAGS_EXT_FEEDBACK — that's it, that's the whole vibe check ⭐

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🌈 SEE ALSO 🌈

• Kernel file ./include/linux/clk/analogbits-wrpll-cln28hpc.h 🦋

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and that's the whole page, bestie! this one came from ./include/linux/clk, dated October 2026, and it's struct wrpll_cfg(9) — go forth and configure your PLLs responsibly 💜✨🌸