STRUCT TI_SCI_MSG_RM_UDMAP_TX_CH_CFG_REQ(9)

📦 version 7.3.1, in nixpkgs unstable

💖 struct ti_sci_msg_rm_udmap_tx_ch_cfg_req(9) 💖

okay so bestie, welcome to the Kernel API Manual — this is the page for struct ti_sci_msg_rm_udmap_tx_ch_cfg_req, and yes it's a whole mouthful, but it's literally the blueprint for configuring a Navigator Subsystem UDMAP transmit channel and she is iconic. let's get into it 🫶

✨ NAME ✨

struct ti_sci_msg_rm_udmap_tx_ch_cfg_req — the struct that configures a Navigator Subsystem UDMAP transmit channel 💅

🦋 SYNOPSIS 🦋

the way this struct is laid out, no notes:

struct ti_sci_msg_rm_udmap_tx_ch_cfg_req {
    struct ti_sci_msg_hdr hdr;
    u32 valid_params;
    u16 nav_id;
    u16 index;
    u8 tx_pause_on_err;
    u8 tx_filt_einfo;
    u8 tx_filt_pswords;
    u8 tx_atype;
    u8 tx_chan_type;
    u8 tx_supr_tdpkt;
    u16 tx_fetch_size;
    u8 tx_credit_count;
    u16 txcq_qnum;
    u8 tx_priority;
    u8 tx_qos;
    u8 tx_orderid;
    u16 fdepth;
    u8 tx_sched_priority;
    u8 tx_burst_size;
    u8 tx_tdtype;
    u8 extended_ch_type;
 };

🎀 Members 🎀

  • hdr — the Generic Header. classic, dependable, we love her 💖
  • valid_params — okay this is the main character honestly. it's a bitfield that says which of the tx channel config params are actually valid. lowkey crucial: if a field's corresponding valid bit is zero, then that field is not valid and will not be used for ch configuration. no cap. the valid bit usage is:
    • 0 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_pause_on_err
    • 1 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_atype
    • 2 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_chan_type
    • 3 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_fetch_size
    • 4 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::txcq_qnum
    • 5 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_priority
    • 6 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_qos
    • 7 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_orderid
    • 8 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_sched_priority
    • 9 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_einfo
    • 10 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_pswords
    • 11 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_supr_tdpkt
    • 12 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
    • 13 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
    • 14 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
    • 15 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
    • 16 — Valid bit for ref ti_sci_msg_rm_udmap_tx_ch_cfg::extended_ch_type
  • nav_id — the SoC device ID of the Navigator Subsystem where the tx channel is located. like, her address basically 🏠
  • index — UDMAP transmit channel index. periodt.
  • tx_pause_on_err — the UDMAP transmit channel pause on error configuration, and it gets programmed into the tx_pause_on_err field of the channel's TCHAN_TCFG register. slay.
  • tx_filt_einfo — UDMAP transmit channel extended packet information passing configuration, programmed into the tx_filt_einfo field of the channel's TCHAN_TCFG register. she's giving details ✨
  • tx_filt_pswords — UDMAP transmit channel protocol specific word passing configuration, programmed into the tx_filt_pswords field of the channel's TCHAN_TCFG register. (say that five times fast, i dare you 😭)
  • tx_atype — UDMAP transmit channel non Ring Accelerator access pointer interpretation configuration, programmed into the tx_atype field of the channel's TCHAN_TCFG register. iconic.
  • tx_chan_type — UDMAP transmit channel functional channel type and work passing mechanism configuration, programmed into the tx_chan_type field of the channel's TCHAN_TCFG register. the way she defines the whole vibe of the channel 💅
  • tx_supr_tdpkt — UDMAP transmit channel teardown packet generation suppression configuration, programmed into the tx_supr_tdpkt field of the channel's TCHAN_TCFG register. suppressing the drama, love that for her.
  • tx_fetch_size — UDMAP transmit channel number of 32-bit descriptor words to fetch configuration, programmed into the tx_fetch_size field of the channel's TCHAN_TCFG register.
⚠️ bestie listen: the user must make sure to set the maximum word count that can pass through the channel for any allowed descriptor type. don't skip this fr fr.
  • tx_credit_count — UDMAP transmit channel transfer request credit count configuration, programmed into the count field of the TCHAN_TCREDIT register. it specifies how many credits for complete TRs are available. giving budget energy 🎀
  • txcq_qnum — UDMAP transmit channel completion queue configuration, programmed into the txcq_qnum field of the TCHAN_TCQ register.
💀 important: the specified completion queue must be assigned to the host — or a subordinate of the host — that's requesting configuration of the transmit channel. no borrowing someone else's queue, that's not the vibe.
  • tx_priority — UDMAP transmit channel transmit priority value, programmed into the priority field of the channel's TCHAN_TPRI_CTRL register. main character priority honestly 👑
  • tx_qos — UDMAP transmit channel transmit qos value, programmed into the qos field of the channel's TCHAN_TPRI_CTRL register. quality of service queen 🌸
  • tx_orderid — UDMAP transmit channel bus order id value, programmed into the orderid field of the channel's TCHAN_TPRI_CTRL register. in order, always ✨
  • fdepth — UDMAP transmit channel FIFO depth configuration, programmed into the fdepth field of the TCHAN_TFIFO_DEPTH register. it sets the number of Tx FIFO bytes that are allowed to be stored for the channel.
🦋 heads up: check the UDMAP section of the TRM for restrictions regarding this parameter. do your reading bestie, i'm serious.
  • tx_sched_priority — UDMAP transmit channel tx scheduling priority configuration, programmed into the priority field of the channel's TCHAN_TST_SCHED register. slotting her into the schedule 💜
  • tx_burst_size — UDMAP transmit channel burst size configuration, programmed into the tx_burst_size field of the TCHAN_TCFG register. burst energy only 🔥
  • tx_tdtype — UDMAP transmit channel teardown type configuration, programmed into the tdtype field of the TCHAN_TCFG register. the options are:
    • 0 — Return immediately
    • 1 — Wait for completion message from remote peer
  • extended_ch_type — Valid for BCDMA. two moods:
    • 0 — the channel is split tx channel (tchan)
    • 1 — the channel is block copy channel (bchan)

🌈 Description 🌈

so what does this whole struct do? it configures the non-real-time registers of a Navigator Subsystem UDMAP transmit channel. simple as that 💖

🫶 but bestie, the rule is real: the channel index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list. no assignment, no channel. iykyk.

⭐ SEE ALSO ⭐

the whole friend group, assembled. go say hi:

  • Kernel file ./drivers/firmware/ti_sci.h
  • struct ti_sci_msg_hdr(9)
  • struct ti_sci_msg_resp_version(9)
  • struct ti_sci_msg_req_reboot(9)
  • struct ti_sci_msg_resp_query_fw_caps(9)
  • struct ti_sci_msg_req_set_device_state(9)
  • struct ti_sci_msg_req_get_device_state(9)
  • struct ti_sci_msg_resp_get_device_state(9)
  • struct ti_sci_msg_req_set_device_resets(9)
  • struct ti_sci_msg_req_set_clock_state(9)
  • struct ti_sci_msg_req_get_clock_state(9)
  • struct ti_sci_msg_resp_get_clock_state(9)
  • struct ti_sci_msg_req_set_clock_parent(9)
  • struct ti_sci_msg_req_get_clock_parent(9)
  • struct ti_sci_msg_resp_get_clock_parent(9)
  • struct ti_sci_msg_req_get_clock_num_parents(9)
  • struct ti_sci_msg_resp_get_clock_num_parents(9)
  • struct ti_sci_msg_req_query_clock_freq(9)
  • struct ti_sci_msg_resp_query_clock_freq(9)
  • struct ti_sci_msg_req_set_clock_freq(9)
  • struct ti_sci_msg_req_get_clock_freq(9)
  • struct ti_sci_msg_resp_get_clock_freq(9)
  • struct ti_sci_msg_req_prepare_sleep(9)
  • struct ti_sci_msg_req_set_io_isolation(9)
  • struct ti_sci_msg_resp_lpm_wake_reason(9)
  • struct ti_sci_msg_req_lpm_set_device_constraint(9)
  • struct ti_sci_msg_req_lpm_set_latency_constraint(9)
  • struct ti_sci_msg_req_get_resource_range(9)
  • struct ti_sci_msg_resp_get_resource_range(9)
  • struct ti_sci_msg_req_manage_irq(9)
  • struct ti_sci_msg_rm_ring_cfg_req(9)
  • struct ti_sci_msg_psil_pair(9)
  • struct ti_sci_msg_psil_unpair(9)
  • struct ti_sci_msg_udmap_rx_flow_cfg(9)
  • struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg(9)
  • struct ti_sci_msg_rm_udmap_rx_ch_cfg_req(9)
  • struct ti_sci_msg_rm_udmap_flow_cfg_req(9)
  • struct ti_sci_msg_req_proc_request(9)
  • struct ti_sci_msg_req_proc_release(9)
  • struct ti_sci_msg_req_proc_handover(9)
  • struct ti_sci_msg_req_set_config(9)
  • struct ti_sci_msg_req_set_ctrl(9)
  • struct ti_sci_msg_req_get_status(9)
  • struct ti_sci_msg_resp_get_status(9)

and that's the page bestie!! 🎀 before you go, the receipts: this one comes from ./drivers/firmware, dated October 2026 — go off, October 2026, you ate 💅✨💖

📦 where this page comes from