STRUCT TI_SCI_MSG_RM_UDMAP_RX_CH_CFG_REQ(9)
πΈ NAME πΈ
struct ti_sci_msg_rm_udmap_rx_ch_cfg_req(9) β from the Kernel API Manual, bestie β is the struct that configures a Navigator Subsystem UDMAP receive channel. π
β¨ SYNOPSIS β¨
Okay so here's the whole struct, literally every field, no cap:
struct ti_sci_msg_rm_udmap_rx_ch_cfg_req {
struct ti_sci_msg_hdr hdr;
u32 valid_params;
u16 nav_id;
u16 index;
u16 rx_fetch_size;
u16 rxcq_qnum;
u8 rx_priority;
u8 rx_qos;
u8 rx_orderid;
u8 rx_sched_priority;
u16 flowid_start;
u16 flowid_cnt;
u8 rx_pause_on_err;
u8 rx_atype;
u8 rx_chan_type;
u8 rx_ignore_short;
u8 rx_ignore_long;
u8 rx_burst_size;
};
π Members π
hdrβ Generic Header. That's it, that's the header vibe. πvalid_paramsβ this bitfield defines the validity of the rx channel configuration parameters. If the matching valid bit is zero, that field is not valid and will not be used for ch configuration. Valid bit usage, periodt:0β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_pause_on_err1β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_atype2β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type3β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_fetch_size4β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rxcq_qnum5β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_priority6β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_qos7β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_orderid8β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority9β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_start10β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_cnt11β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_short12β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_long14β Valid bit forti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size
nav_idβ the SoC device ID of the Navigator Subsystem where the rx channel is located. π°οΈindexβ the UDMAP receive channel index. Like, which receive channel we're talking about, bestie. πrx_fetch_sizeβ the UDMAP receive channel's number of 32-bit descriptor words to fetch configuration, and it gets programmed into therx_fetch_sizefield of the channel'sRCHAN_RCFGregister. β¨rxcq_qnumβ the UDMAP receive channel completion queue configuration to be programmed into therxcq_qnumfield of theRCHAN_RCQregister. Heads up: the specified completion queue must be assigned to the host β or a subordinate of the host β that's requesting configuration of the receive channel. No rando queues, iykyk. πrx_priorityβ the UDMAP receive channel receive priority value to be programmed into thepriorityfield of the channel'sRCHAN_RPRI_CTRLregister. πΈrx_qosβ the UDMAP receive channel receive qos value to be programmed into theqosfield of the channel'sRCHAN_RPRI_CTRLregister. π¦rx_orderidβ the UDMAP receive channel bus order id value to be programmed into theorderidfield of the channel'sRCHAN_RPRI_CTRLregister. πrx_sched_priorityβ the UDMAP receive channel rx scheduling priority configuration to be programmed into thepriorityfield of the channel'sRCHAN_RST_SCHEDregister. βflowid_startβ this is the UDMAP receive channel additional flows starting index configuration, and it gets programmed into theflow_startfield of theRCHAN_RFLOW_RNGregister. It specifies the starting index for flow IDs the receive channel is to make use of beyond the default flow.flowid_startand refflowid_cntmust be set as valid and configured together. The starting flow ID set by refflowid_cntmust be a flow index within the Navigator Subsystem's subset of flows beyond the default flows statically mapped to receive channels. The additional flows must be assigned to the host β or a subordinate of the host β requesting configuration of the receive channel. π₯flowid_cntβ this is the UDMAP receive channel additional flows count configuration to program into theflowid_cntfield of theRCHAN_RFLOW_RNGregister. This field specifies how many flow IDs are in the additional contiguous range of legal flow IDs for the channel. refflowid_startandflowid_cntmust be set as valid and configured together. Disabling thevalid_paramsfield bit forflowid_cntindicates no flow IDs other than the default are to be allocated and used by the receive channel. refflowid_startplusflowid_cntcannot be greater than the number of receive flows in the receive channel's Navigator Subsystem. The additional flows must be assigned to the host β or a subordinate of the host β requesting configuration of the receive channel. πrx_pause_on_errβ the UDMAP receive channel pause on error configuration to be programmed into therx_pause_on_errfield of the channel'sRCHAN_RCFGregister. πrx_atypeβ the UDMAP receive channel non Ring Accelerator access pointer interpretation configuration to be programmed into therx_atypefield of the channel'sRCHAN_RCFGregister. πrx_chan_typeβ the UDMAP receive channel functional channel type and work passing mechanism configuration to be programmed into therx_chan_typefield of the channel'sRCHAN_RCFGregister. π§rx_ignore_shortβ the UDMAP receive channel short packet treatment configuration to be programmed into therx_ignore_shortfield of theRCHAN_RCFGregister. πrx_ignore_longβ the UDMAP receive channel long packet treatment configuration to be programmed into therx_ignore_longfield of theRCHAN_RCFGregister. πrx_burst_sizeβ the UDMAP receive channel burst size configuration to be programmed into therx_burst_sizefield of theRCHAN_RCFGregister. π«Ά
π¦ Description π¦
This struct configures the non-real-time registers of a Navigator Subsystem UDMAP receive channel. The channel index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list. That's the rule, bestie β no skipping it. π
π₯ SEE ALSO π₯
Kernel file: ./drivers/firmware/ti_sci.h
struct ti_sci_msg_hdr(9)struct ti_sci_msg_resp_version(9)struct ti_sci_msg_req_reboot(9)struct ti_sci_msg_resp_query_fw_caps(9)struct ti_sci_msg_req_set_device_state(9)struct ti_sci_msg_req_get_device_state(9)struct ti_sci_msg_resp_get_device_state(9)struct ti_sci_msg_req_set_device_resets(9)struct ti_sci_msg_req_set_clock_state(9)struct ti_sci_msg_req_get_clock_state(9)struct ti_sci_msg_resp_get_clock_state(9)struct ti_sci_msg_req_set_clock_parent(9)struct ti_sci_msg_req_get_clock_parent(9)struct ti_sci_msg_resp_get_clock_parent(9)struct ti_sci_msg_req_get_clock_num_parents(9)struct ti_sci_msg_resp_get_clock_num_parents(9)struct ti_sci_msg_req_query_clock_freq(9)struct ti_sci_msg_resp_query_clock_freq(9)struct ti_sci_msg_req_set_clock_freq(9)struct ti_sci_msg_req_get_clock_freq(9)struct ti_sci_msg_resp_get_clock_freq(9)struct ti_sci_msg_req_prepare_sleep(9)struct ti_sci_msg_req_set_io_isolation(9)struct ti_sci_msg_resp_lpm_wake_reason(9)struct ti_sci_msg_req_lpm_set_device_constraint(9)struct ti_sci_msg_req_lpm_set_latency_constraint(9)struct ti_sci_msg_req_get_resource_range(9)struct ti_sci_msg_resp_get_resource_range(9)struct ti_sci_msg_req_manage_irq(9)struct ti_sci_msg_rm_ring_cfg_req(9)struct ti_sci_msg_psil_pair(9)struct ti_sci_msg_psil_unpair(9)struct ti_sci_msg_udmap_rx_flow_cfg(9)struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg(9)struct ti_sci_msg_rm_udmap_tx_ch_cfg_req(9)struct ti_sci_msg_rm_udmap_flow_cfg_req(9)struct ti_sci_msg_req_proc_request(9)struct ti_sci_msg_req_proc_release(9)struct ti_sci_msg_req_proc_handover(9)struct ti_sci_msg_req_set_config(9)struct ti_sci_msg_req_set_ctrl(9)struct ti_sci_msg_req_get_status(9)struct ti_sci_msg_resp_get_status(9)
That's the whole page, bestie π β source path ./drivers/firmware, date October 2026, and the footer label is struct ti_sc...x_ch_cfg_req(9). Mwah! π
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π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms