STRUCT TEGRA_PMC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸŽ€ struct tegra_pmc(9) β€” the Kernel API Manual, bestie edition πŸŽ€

okay so. this page is from the Kernel API Manual, section 9 (that's the kernel-API girlies), and it's literally all about struct tegra_pmc β€” aka the NVIDIA Tegra PMC. no cap, it's a big one. let's get into it πŸ’…


✨ NAME ✨

struct tegra_pmc β€” NVIDIA Tegra PMC. that's it, that's the name, she's iconic πŸ‘‘


🌸 SYNOPSIS 🌸

here's the whole struct, copy-pasted exact because we do NOT play with code integrity, bestie:

struct tegra_pmc {
    struct device *dev;
    void __iomem *base;
    void __iomem *wake;
    void __iomem *aotag;
    void __iomem *scratch;
    struct clk *clk;
    const struct tegra_pmc_soc *soc;
    bool tz_only;
    unsigned long rate;
    enum tegra_suspend_mode suspend_mode;
    u32 cpu_good_time;
    u32 cpu_off_time;
    u32 core_osc_time;
    u32 core_pmu_time;
    u32 core_off_time;
    bool corereq_high;
    bool sysclkreq_high;
    bool combined_req;
    bool cpu_pwr_good_en;
    u32 lp0_vec_phys;
    u32 lp0_vec_size;
    bool invert_irq;
    unsigned long powergates_available[BITS_TO_LONGS(
TEGRA_POWERGATE_MAX)];
    struct mutex powergates_lock;
    struct pinctrl_dev *pctl_dev;
    struct irq_domain *domain;
    struct irq_chip irq;
    struct notifier_block clk_nb;
    bool core_domain_state_synced;
    unsigned long *wake_type_level_map;
    unsigned long *wake_type_dual_edge_map;
    unsigned long *wake_sw_status_map;
    unsigned long *wake_cntrl_level_map;
    struct notifier_block reboot_notifier;
    struct syscore syscore;
    struct irq_work wake_work;
    u32 *wake_status;
 };

πŸ¦‹ Members πŸ¦‹

time for the member-by-member tour, and yes i'm gonna hype up every single one because they all matter πŸ’–

  • dev β€” pointer to the PMC device structure. the whole thing's home base 🏠
  • base β€” pointer to the I/O remapped register region. where the registers actually live ✨
  • wake β€” pointer to the I/O remapped region for WAKE registers. wake-up business goes here πŸ‘€
  • aotag β€” pointer to the I/O remapped region for AOTAG registers. yes bestie, its own remapped region πŸŽ€
  • scratch β€” pointer to the I/O remapped region for scratch registers. scribble notes here πŸ“
  • clk β€” pointer to the pclk clock. clock girlie ⏰
  • soc β€” pointer to the SoC data structure. tells you which chip you're on, iykyk πŸ”₯
  • tz_only β€” flag specifying if the PMC can only be accessed via TrustZone. so like, if this is set, no direct poking at it, periodt 🚫
  • rate β€” currently configured rate of pclk. how fast she's running rn πŸƒβ€β™€οΈ
  • suspend_mode β€” lowest suspend mode available. the deepest nap she can take 😴
  • cpu_good_time β€” CPU power good time (in microseconds). ⏱️
  • cpu_off_time β€” CPU power off time (in microsecends). (that typo is in the original, i'm keeping it, it's canon 🫢)
  • core_osc_time β€” core power good OSC time (in microseconds). ✨
  • core_pmu_time β€” core power good PMU time (in microseconds). πŸ’œ
  • core_off_time β€” core power off time (in microseconds). πŸ”Œ
  • corereq_high β€” core power request is active-high. polarity tea β˜•
  • sysclkreq_high β€” system clock request is active-high. also polarity tea β˜•
  • combined_req β€” combined power request for CPU & core. they share, cute 🀝
  • cpu_pwr_good_en β€” CPU power good signal is enabled. she's on βœ…
  • lp0_vec_phys β€” physical base address of the LP0 warm boot code. where the warm-boot code sits in phys memory πŸ”₯
  • lp0_vec_size β€” size of the LP0 warm boot code. how big that chunk is πŸ“
  • invert_irq β€” polarity of the PMU IRQ is inverted. upside-down interrupt vibes πŸ™ƒ
  • powergates_available β€” Bitmap of available power gates. the roster of gates you're allowed to touch πŸ‘‘
  • powergates_lock β€” mutex for power gate register access. keep your hands to yourself while someone else is in there πŸ”’
  • pctl_dev β€” pin controller exposed by the PMC. yes, the PMC hands out a pin controller too, multitalented πŸ’…
  • domain β€” IRQ domain provided by the PMC. interrupt turf πŸ—ΊοΈ
  • irq β€” chip implementation for the IRQ domain. the actual chip logic 🧠
  • clk_nb β€” pclk clock changes handler. she listens for clock drama πŸ‘‚
  • core_domain_state_synced β€” flag marking the core domain's state as synced. synced = βœ…
  • wake_type_level_map β€” Bitmap indicating level type for non-dual edge wakes. πŸ“Š
  • wake_type_dual_edge_map β€” Bitmap indicating if a wake is dual-edge or not. deux edges or nah πŸ¦‹
  • wake_sw_status_map β€” Bitmap to hold raw status of wakes without mask. the unfiltered truth πŸ’€
  • wake_cntrl_level_map β€” Bitmap to hold wake levels to be programmed in cntrl register associated with each wake during system suspend. so during suspend, every wake gets its level written into the cntrl register, and this bitmap keeps track 🎯
  • reboot_notifier β€” PMC reboot notifier handler. she gets pinged on reboot πŸ””
  • syscore β€” syscore suspend/resume callbacks. the suspend/resume hookup 😴
  • wake_work β€” IRQ work handler for processing wake-up events. queue that work πŸ“¬
  • wake_status β€” Status of wake-up events. what woke us up, bestie πŸ‘€

🌈 SEE ALSO 🌈

Kernel file ./drivers/soc/tegra/pmc.c, plus all these siblings β€” go read them, they're the rest of the family fr fr:


πŸ’– and that's the whole page, bestie. go forth and powergate responsibly.

and finally, the sign-off 🌸: this one lives at ./drivers/soc/tegra, dated October 2026, and the footer names her struct tegra_pmc(9) β€” same as the header. no notes, she ate πŸ’…βœ¨

πŸ“¦ where this page comes from