STRUCT TEGRA_PMC(9)
π struct tegra_pmc(9) β the Kernel API Manual, bestie edition π
okay so. this page is from the Kernel API Manual, section 9 (that's the kernel-API girlies), and it's literally all about struct tegra_pmc β aka the NVIDIA Tegra PMC. no cap, it's a big one. let's get into it π
β¨ NAME β¨
struct tegra_pmc β NVIDIA Tegra PMC. that's it, that's the name, she's iconic π
πΈ SYNOPSIS πΈ
here's the whole struct, copy-pasted exact because we do NOT play with code integrity, bestie:
struct tegra_pmc {
struct device *dev;
void __iomem *base;
void __iomem *wake;
void __iomem *aotag;
void __iomem *scratch;
struct clk *clk;
const struct tegra_pmc_soc *soc;
bool tz_only;
unsigned long rate;
enum tegra_suspend_mode suspend_mode;
u32 cpu_good_time;
u32 cpu_off_time;
u32 core_osc_time;
u32 core_pmu_time;
u32 core_off_time;
bool corereq_high;
bool sysclkreq_high;
bool combined_req;
bool cpu_pwr_good_en;
u32 lp0_vec_phys;
u32 lp0_vec_size;
bool invert_irq;
unsigned long powergates_available[BITS_TO_LONGS(
TEGRA_POWERGATE_MAX)];
struct mutex powergates_lock;
struct pinctrl_dev *pctl_dev;
struct irq_domain *domain;
struct irq_chip irq;
struct notifier_block clk_nb;
bool core_domain_state_synced;
unsigned long *wake_type_level_map;
unsigned long *wake_type_dual_edge_map;
unsigned long *wake_sw_status_map;
unsigned long *wake_cntrl_level_map;
struct notifier_block reboot_notifier;
struct syscore syscore;
struct irq_work wake_work;
u32 *wake_status;
};
π¦ Members π¦
time for the member-by-member tour, and yes i'm gonna hype up every single one because they all matter π
devβ pointer to the PMC device structure. the whole thing's home base πbaseβ pointer to the I/O remapped register region. where the registers actually live β¨wakeβ pointer to the I/O remapped region for WAKE registers. wake-up business goes here πaotagβ pointer to the I/O remapped region for AOTAG registers. yes bestie, its own remapped region πscratchβ pointer to the I/O remapped region for scratch registers. scribble notes here πclkβ pointer to thepclkclock. clock girlie β°socβ pointer to the SoC data structure. tells you which chip you're on, iykyk π₯tz_onlyβ flag specifying if the PMC can only be accessed via TrustZone. so like, if this is set, no direct poking at it, periodt π«rateβ currently configured rate ofpclk. how fast she's running rn πββοΈsuspend_modeβ lowest suspend mode available. the deepest nap she can take π΄cpu_good_timeβ CPU power good time (in microseconds). β±οΈcpu_off_timeβ CPU power off time (in microsecends). (that typo is in the original, i'm keeping it, it's canon π«Ά)core_osc_timeβ core power good OSC time (in microseconds). β¨core_pmu_timeβ core power good PMU time (in microseconds). πcore_off_timeβ core power off time (in microseconds). πcorereq_highβ core power request is active-high. polarity tea βsysclkreq_highβ system clock request is active-high. also polarity tea βcombined_reqβ combined power request for CPU & core. they share, cute π€cpu_pwr_good_enβ CPU power good signal is enabled. she's on βlp0_vec_physβ physical base address of the LP0 warm boot code. where the warm-boot code sits in phys memory π₯lp0_vec_sizeβ size of the LP0 warm boot code. how big that chunk is πinvert_irqβ polarity of the PMU IRQ is inverted. upside-down interrupt vibes πpowergates_availableβ Bitmap of available power gates. the roster of gates you're allowed to touch πpowergates_lockβ mutex for power gate register access. keep your hands to yourself while someone else is in there πpctl_devβ pin controller exposed by the PMC. yes, the PMC hands out a pin controller too, multitalented πdomainβ IRQ domain provided by the PMC. interrupt turf πΊοΈirqβ chip implementation for the IRQ domain. the actual chip logic π§clk_nbβpclkclock changes handler. she listens for clock drama πcore_domain_state_syncedβ flag marking the core domain's state as synced. synced = βwake_type_level_mapβ Bitmap indicating level type for non-dual edge wakes. πwake_type_dual_edge_mapβ Bitmap indicating if a wake is dual-edge or not. deux edges or nah π¦wake_sw_status_mapβ Bitmap to hold raw status of wakes without mask. the unfiltered truth πwake_cntrl_level_mapβ Bitmap to hold wake levels to be programmed incntrlregister associated with each wake during system suspend. so during suspend, every wake gets its level written into thecntrlregister, and this bitmap keeps track π―reboot_notifierβ PMC reboot notifier handler. she gets pinged on reboot πsyscoreβ syscore suspend/resume callbacks. the suspend/resume hookup π΄wake_workβ IRQ work handler for processing wake-up events. queue that work π¬wake_statusβ Status of wake-up events. what woke us up, bestie π
π SEE ALSO π
Kernel file ./drivers/soc/tegra/pmc.c, plus all these siblings β go read them, they're the rest of the family fr fr:
tegra_powergate_set(9)devm_tegra_pmc_get(9)tegra_pmc_powergate_power_on(9)tegra_pmc_powergate_power_off(9)tegra_powergate_is_powered(9)tegra_pmc_powergate_remove_clamping(9)tegra_pmc_powergate_sequence_power_up(9)tegra_pmc_io_pad_power_enable(9)tegra_pmc_io_pad_power_disable(9)tegra_get_cpu_powergate_id(9)tegra_pmc_cpu_is_powered(9)tegra_pmc_cpu_power_on(9)tegra_pmc_cpu_remove_clamping(9)
π and that's the whole page, bestie. go forth and powergate responsibly.
and finally, the sign-off πΈ: this one lives at ./drivers/soc/tegra, dated October 2026, and the footer names her struct tegra_pmc(9) β same as the header. no notes, she ate π
β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms