STRUCT TEGRA_PINGROUP(9)

💅 struct tegra_pingroup(9) — kernel API manual, but make it make sense

okay so bestie, this is the page for struct tegra_pingroup from the kernel API manual (yes, the manual name is literally struct tegra_pingroup(9), we're doing this ✨). It's the little struct that describes one group of pins inside the Tegra pin controller, and honestly? It ate. Let's get into it 🎀

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🌸 NAME 🌸

struct tegra_pingroup — the Tegra pin group 💖

Breaking down the doc-comment fields real quick, because they're part of the name blurb and we don't skip:

• @name — the name of the pin group.
• @pins — an array of pin IDs included in this pin group.
• @npins — the number of entries in @pins.
• @funcs — the mux functions which can be muxed onto this group.

periodt. now the actual struct 👑

✨ SYNOPSIS ✨

struct tegra_pingroup {
    const char *name;
    const unsigned *pins;
    u8 npins;
    u8 funcs[4];
    s32 mux_reg;
    s32 pupd_reg;
    s32 tri_reg;
    s32 drv_reg;
    u32 mux_bank:2;
    u32 pupd_bank:2;
    u32 tri_bank:2;
    u32 drv_bank:2;
    s32 mux_bit:6;
    s32 pupd_bit:6;
    s32 tri_bit:6;
    s32 einput_bit:6;
    s32 odrain_bit:6;
    s32 lock_bit:6;
    s32 ioreset_bit:6;
    s32 rcv_sel_bit:6;
    s32 hsm_bit:6;
    s32 sfsel_bit:6;
    s32 schmitt_bit:6;
    s32 lpmd_bit:6;
    s32 drvdn_bit:6;
    s32 drvup_bit:6;
    s32 slwr_bit:6;
    s32 slwf_bit:6;
    s32 lpdr_bit:6;
    s32 drvtype_bit:6;
    s32 drvdn_width:6;
    s32 drvup_width:6;
    s32 slwr_width:6;
    s32 slwf_width:6;
    u32 parked_bitmask;
 };

look at all those bitfields, she's got range 😭🔥

🦋 Members 🦋

okay, storytime for every single one of these, no skips, no cap:

• mux_reg — Mux register offset. This register contains the mux, einput, odrain, lock, ioreset, rcv_sel parameters. the icon of the group fr.
• pupd_reg — Pull-up/down register offset.
• tri_reg — Tri-state register offset.
• drv_reg — Drive fields register offset. This register contains hsm, schmitt, lpmd, drvdn, drvup, slwr, slwf, and drvtype parameters. she's carrying the whole drive squad 💅
• mux_bank — Mux register bank.
• pupd_bank — Pull-up/down register bank.
• tri_bank — Tri-state register bank.
• drv_bank — Drive fields register bank.
• mux_bit — Mux register bit.
• pupd_bit — Pull-up/down register bit.
• tri_bit — Tri-state register bit.
• einput_bit — Enable-input register bit.
• odrain_bit — Open-drain register bit.
• lock_bit — Lock register bit.
• ioreset_bit — IO reset register bit.
• rcv_sel_bit — Receiver select bit.
• hsm_bit — High Speed Mode register bit.
• sfsel_bit — GPIO/SFIO selection register bit.
• schmitt_bit — Schmitt register bit.
• lpmd_bit — Low Power Mode register bit.
• drvdn_bit — Drive Down register bit.
• drvup_bit — Drive Up register bit.
• slwr_bit — Slew Rising register bit.
• slwf_bit — Slew Falling register bit.
• lpdr_bit — Base driver enabling bit.
• drvtype_bit — Drive type register bit.
• drvdn_width — Drive Down field width.
• drvup_width — Drive Up field width.
• slwr_width — Slew Rising field width.
• slwf_width — Slew Falling field width.
• parked_bitmask — Parked register mask. 0 if unsupported. (so if you see a 0, she simply doesn't do that, don't come for her 💀)

🌈 Description 🌈

okay this is the important lore, bestie, listen up 🫶

-1 in a *_reg field means that feature is unsupported for this group. *_bank and *_reg values are irrelevant when *_reg is -1. And when *_reg is valid, *_bit may be -1 to indicate an unsupported feature. so like, -1 is the universal "not my department" flag, iykyk 🙈

Now the big picture: this struct is a representation of a group of pins (possibly just one pin — yes, a group of one, she's quirky like that) in the Tegra pin controller. Each group allows some parameter or parameters to be configured. The most common is mux function selection. Many others exist such as pull-up/down, tri-state, etc.

And here's the why: Tegra's pin controller is complex; certain groups may only support configuring certain parameters, hence each parameter is optional. it's giving "every group is a main character with her own boundaries" 💜

fr fr though — everything here is optional by design. don't assume a group can do a thing just because some other group can. vibe check the -1s first.

👑 SEE ALSO 👑

• Kernel file ./drivers/pinctrl/tegra/pinctrl-tegra.h
• struct tegra_function(9)
• struct tegra_pinctrl_soc_data(9)

go read those next, bestie, they're the friend group 🧚✨

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and that's the whole page! 🎀 this came from ./drivers/pinctrl/tegra, dated October 2026 — mwah, slay, drink water, and go configure some pins 💖🦋🍓