STRUCT TEGRA_CLK_SYNC_SOURCE(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– STRUCT TEGRA_CLK_SYNC_SOURCE(9) πŸ’–

okay bestie, welcome to the Kernel API Manual β€” this one's a lil struct page but it's lowkey iconic, i promise 🫢


✨ NAME ✨

struct tegra_clk_sync_source β€” an external clock source, and it comes straight from the codec, no cap πŸŽ€


🌸 SYNOPSIS 🌸

struct tegra_clk_sync_source {
    struct clk_hw hw;
    unsigned long   rate;
    unsigned long   max_rate;
 };

like, that's the whole thing. three members. she's compact and she knows it πŸ’…


πŸ¦‹ MEMBERS πŸ¦‹

  • hw β€” the handle that sits between the common clock interfaces and the hardware-specific ones. she's the middleman, the liaison, the main character energy connector ✨
  • rate β€” the input frequency coming from the source. literally the whole vibe number πŸ”₯
  • max_rate β€” the max rate allowed. the ceiling. the limit. the "bestie, that's enough" 😭

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/clk/tegra/clk.h
  • struct tegra_clk_frac_div(9)
  • struct tegra_clk_pll_freq_table(9)
  • struct pdiv_map(9)
  • struct div_nmp(9)
  • struct tegra_clk_pll_params(9)
  • struct tegra_clk_pll(9)
  • struct tegra_audio_clk_info(9)
  • struct tegra_clk_pll_out(9)
  • struct tegra_clk_periph_regs(9)
  • struct tegra_clk_periph_gate(9)
  • struct tegra_sdmmc_mux(9)

like, the whole friend group fr fr πŸ‘‘ go read them, iykyk πŸ’œ


ngl, this page is short but she's part of a whole squad in ./drivers/clk/tegra β€” don't skip the rest just because this one's a lil three-field struct πŸ“

anyway that's the tea 🧚 this page came out October 2026 from ./drivers/clk/tegra, so go forth and clock-sync slay πŸ’–βœ¨πŸŽ€

πŸ“¦ where this page comes from