STRUCT TEGRA_CLK_PLL_OUT(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct tegra_clk_pll_out(9) ✨

okay so bestie, we're in the Kernel API Manual today and the vibe is very "hardware clock divider realness". this is the struct tegra_clk_pll_out page β€” it's giving PLL divider down clock energy, and honestly? she ate. let's get into it πŸ’…


🌸 NAME 🌸

struct tegra_clk_pll_out β€” the PLL divider down clock. literally that's her whole job. no cap.


πŸŽ€ SYNOPSIS πŸŽ€

bestie. here's the whole struct, untouched, exactly as the kernel gods wrote it, don't come for me:

struct tegra_clk_pll_out {
    struct clk_hw   hw;
    void __iomem    *reg;
    u8 enb_bit_idx;
    u8 rst_bit_idx;
    spinlock_t *lock;
    u8 flags;
 };

πŸ’– Members πŸ’–

so these are the little guys that live inside her. let's meet the cast:

  • hw β€” the handle that vibes between the common clock interfaces and the hardware-specific ones. she's the bridge, she's the main character, she translates for both sides ✨
  • reg β€” the register that's holding the PLL divider. that's where the divider actually lives, <italic>*reg</italic> is a void __iomem pointer btw so she's memory-mapped and mysterious πŸ¦‹
  • enb_bit_idx β€” the bit index that enables/disables the PLL divider. flip her one way, divider's on; other way, she's off 😴
  • rst_bit_idx β€” the bit index that resets the PLL divider. chaotic but necessary. push it and she starts over πŸ”₯
  • lock β€” the register lock, a spinlock_t * fr. keeps everyone from touching the registers at the same time, because sharing is caring but racing is not 🌸
  • flags β€” hardware-specific flags. mysterious. iconic. hardware-dependent so nobody can tell you exactly what's in there πŸ‘‘
also ngl, enb_bit_idx, rst_bit_idx and flags are all u8 β€” small but mighty, and don't you forget it πŸ’œ

πŸ’€ SEE ALSO πŸ’€

the whole friend group, currently in the kernel file ./drivers/clk/tegra/clk.h:

  • struct tegra_clk_sync_source(9)
  • struct tegra_clk_frac_div(9)
  • struct tegra_clk_pll_freq_table(9)
  • struct pdiv_map(9)
  • struct div_nmp(9)
  • struct tegra_clk_pll_params(9)
  • struct tegra_clk_pll(9)
  • struct tegra_audio_clk_info(9)
  • struct tegra_clk_periph_regs(9)
  • struct tegra_clk_periph_gate(9)
  • struct tegra_sdmmc_mux(9)

like, the entire tegra clock crew pulled up. squad goals 🫢


and that's the page!! mwah πŸ’‹ this one shipped from ./drivers/clk/tegra and it's dated October 2026 β€” so yeah, she's from the future, she's ahead of her time, and she's still struct tegra_clk_pll_out(9). iykyk. go read your kernel source bestie 🌈⭐

πŸ“¦ where this page comes from