STRUCT TEGRA_CLK_PERIPH_REGS(9)

🌸 NAME 🌸

struct tegra_clk_periph_regs — Registers controlling peripheral clock. This page is struct tegra..._periph_regs(9) from the Kernel API Manual, and bestie, we're about to make these register fields make sense. 💖

✨ SYNOPSIS ✨

       struct tegra_clk_periph_regs {
           u32 enb_reg;
           u32 enb_set_reg;
           u32 enb_clr_reg;
           u32 rst_reg;
           u32 rst_set_reg;
           u32 rst_clr_reg;
        };

🫶 Members 🫶

okay so every member has exactly one job, and the vibe check is immaculate:

• enb_reg — read the enable status 👑
• enb_set_reg — write 1 to enable clock 🔥
• enb_clr_reg — write 1 to disable clock 💅
• rst_reg — read the reset status 🌈
• rst_set_reg — write 1 to assert the reset of peripheral ⭐
• rst_clr_reg — write 1 to deassert the reset of peripheral 🦋

💀 SEE ALSO 💀

Kernel file ./drivers/clk/tegra/clk.h — plus the whole struct bestie lineup:

• struct tegra_clk_sync_source(9)
• struct tegra_clk_frac_div(9)
• struct tegra_clk_pll_freq_table(9)
• struct pdiv_map(9)
• struct div_nmp(9)
• struct tegra_clk_pll_params(9)
• struct tegra_clk_pll(9)
• struct tegra_audio_clk_info(9)
• struct tegra_clk_pll_out(9)
• struct tegra_clk_periph_gate(9)
• struct tegra_sdmmc_mux(9)

cute sign-off, bestie 🫶: Kernel API Manual, source path ./drivers/clk/tegra, date October 2026, page struct tegra..._periph_regs(9) — periodt. 💅✨