STRUCT TB_MARGINING(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct tb_margining(9) ✨

okay so bestie, welcome to the lane margining glow-up πŸ’… this is a page straight out of the Kernel API Manual, and it's all about struct tb_margining β€” the lane margining support struct. yes, margining. no, not the cocktail kind. πŸ“


πŸŽ€ NAME πŸŽ€

struct tb_margining β€” lane margining support πŸ’– literally the whole personality of this struct.


🌸 SYNOPSIS 🌸

here's the struct in all its main-character glory, copy-pasted exactly because we do not mess with code:

struct tb_margining {
    struct tb_port *port;
    enum usb4_sb_target target;
    u8 index;
    struct device *dev;
    unsigned int gen;
    bool asym_rx;
    u32 caps[3];
    u32 results[3];
    enum usb4_margining_lane lanes;
    unsigned int min_ber_level;
    unsigned int max_ber_level;
    unsigned int ber_level;
    unsigned int voltage_steps;
    unsigned int max_voltage_offset;
    unsigned int voltage_steps_optional_range;
    unsigned int max_voltage_offset_optional_range;
    unsigned int time_steps;
    unsigned int max_time_offset;
    unsigned int voltage_time_offset;
    unsigned int dwell_time;
    enum usb4_margin_sw_error_counter error_counter;
    bool optional_voltage_offset_range;
    bool software;
    bool time;
    bool right_high;
    bool upper_eye;
};

πŸ¦‹ Members πŸ¦‹

okay now the field-by-field tour, no cap 🫢

  • port β€” the USB4 port that the margining operations actually run through. it's giving "the doorway you walk through." πŸšͺ
  • target β€” the sideband target. iykyk.
  • index β€” the retimer index, but only if taget is USB4_SB_TARGET_RETIMER. and yeah, "taget" is spelled like that in the original, not me being chaotic πŸ™ˆ keep the source's spelling, it's iconic in its own way.
  • dev β€” pointer to the device that is the target (so: the USB4 port or the retimer). pointing at your fave ✨
  • gen β€” link generation.
  • asym_rx β€” true% if the port supports an asymmetric link with 3 Rx. (yes, true%. that's literally what it says. the percent sign said slay and stayed πŸ’€)
  • caps β€” port lane margining capabilities.
  • results β€” the last lane margining results. receipts! 🧾
  • lanes β€” 0, 1 or 7 (all). that's the whole menu, bestie.
  • min_ber_level β€” minimum supported BER level contour value.
  • max_ber_level β€” maximum supported BER level contour value.
  • ber_level β€” the current BER level contour value.
  • voltage_steps β€” number of mandatory voltage steps.
  • max_voltage_offset β€” maximum mandatory voltage offset (in mV).
  • voltage_steps_optional_range β€” number of voltage steps for the optional range.
  • max_voltage_offset_optional_range β€” maximum voltage offset for the optional range (in mV). (with a period, because she's thorough πŸ’…)
  • time_steps β€” number of time margin steps.
  • max_time_offset β€” maximum time margin offset (in mUI).
  • voltage_time_offset β€” offset for voltage / time for software margining.
  • dwell_time β€” dwell time for software margining (in ms).
  • error_counter β€” error counter operation for software margining.
  • optional_voltage_offset_range β€” enable the optional extended voltage range. go off, extended range πŸ‘‘
  • software β€” true if software margining is used instead of hardware.
  • time β€” true if time margining is used instead of voltage.
  • right_high β€” false if a left/low margin test is performed, true if right/high.
  • upper_eye β€” false if the lower PAM3 eye is used, true if the upper eye is used. πŸ‘οΈ two eyes, one struct.

πŸ”₯ SEE ALSO πŸ”₯

go read these next, bestie, the lore continues:


🌈 friendly reminder: every field name, type, value and tiny weird spelling above is exactly as the manpage gave it. the vibes are new, the facts are untouched. periodt. πŸ’œ

and that's the whole page!! πŸŽ€ sourced from ./drivers/thunderbolt, dated October 2026, and titled struct tb_margining(9) forever and always β€” mwah, go margin some lanes bestie πŸ§šπŸ’–

πŸ“¦ where this page comes from