STRUCT SVC_I3C_MASTER(9)
π struct svc_i3c_master(9) π
okay bestie, so this is the Kernel API Manual page for struct svc_i3c_master β aka the Silvaco I3C Master structure. it's a big ol' struct, like the main character of the Silvaco I3C driver, and we're gonna go through every single field together. no skips, no "eh you get the idea". grab a snack π
β¨ NAME β¨
struct svc_i3c_master β the Silvaco I3C Master structure. that's it, that's the vibe π
πΈ SYNOPSIS πΈ
here's the whole thing, character for character, because we do not paraphrase a struct definition in this house:
struct svc_i3c_master {
struct i3c_master_controller base;
struct device *dev;
void __iomem *regs;
struct svc_i3c_regs_save saved_regs;
u32 free_slots;
u8 addrs[SVC_I3C_MAX_DEVS];
struct i3c_dev_desc *descs[SVC_I3C_MAX_DEVS];
int irq;
int num_clks;
struct clk *fclk;
struct clk_bulk_data *clks;
struct {
struct list_head list;
struct svc_i3c_xfer *cur;
spinlock_t lock;
} xferqueue;
struct {
unsigned int num_slots;
struct i3c_dev_desc **slots;
struct i3c_ibi_slot *tbq_slot;
spinlock_t lock;
} ibi;
struct mutex lock;
const struct svc_i3c_drvdata *drvdata;
u32 enabled_events;
u32 mctrl_config;
};
look at her. stunning. iconic. literally a work of art π
π¦ Members π¦
okay now the fun part β every field, explained, one by one:
baseβ the I3C master controller. this is the core bit πdevβ the corresponding device. her device.regsβ the memory mapping. where the registers live.saved_regsβ volatile values kept around for PM operations (power management girlies, this one's for you) πfree_slotsβ bit array of available slots.addrsβ array containing the dynamic addresses of each attached device. yes, dynamic.descsβ array of descriptors, one per attached device. onedescsentry per device, no cap.irqβ the main interrupt. the big one. main character interrupt energy β‘num_clksβ the I3C clock number.fclkβ the fast clock (bus).clksβ the I3C clock array.xferqueueβ the transfer queue structure πxferqueue.listβ list member.xferqueue.curβ the current ongoing transfer.xferqueue.lockβ queue lock.
ibiβ the IBI structure.ibi.num_slotsβ number of slots available inibi.slots.ibi.slotsβ the available IBI slots.ibi.tbq_slotβ the to be queued IBI slot.ibi.lockβ IBI lock.
lockβ transfer lock, protecting between the IBI work thread and callbacks from master. she's astruct mutex, she's doing the work π«Άdrvdataβ driver data.enabled_eventsβ bit masks for enable events (IBI, HotJoin).mctrl_configβ configuration value inSVC_I3C_MCTRLfor setting speed back.
ngl, that's a lot of spinlocks in one struct, but honestly? she's thriving.
π₯ SEE ALSO π₯
- Kernel file
./drivers/i3c/master/svc-i3c-master.cstructsvc_i3c_i2c_dev_data(9)
like, go read those too, they're literally cousins π
aaaand that's the page!! β¨ you made it all the way through the struct, i'm so proud π₯Ήπ this was the Kernel API Manual, dated October 2026, sourced from ./drivers/i3c/master β mwah, slay, periodt, go read the source bestie ππ¦πΈ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms