STRUCT SVC_I3C_MASTER(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’œ struct svc_i3c_master(9) πŸ’œ

okay bestie, so this is the Kernel API Manual page for struct svc_i3c_master β€” aka the Silvaco I3C Master structure. it's a big ol' struct, like the main character of the Silvaco I3C driver, and we're gonna go through every single field together. no skips, no "eh you get the idea". grab a snack πŸ“


✨ NAME ✨

struct svc_i3c_master β€” the Silvaco I3C Master structure. that's it, that's the vibe πŸ’…


🌸 SYNOPSIS 🌸

here's the whole thing, character for character, because we do not paraphrase a struct definition in this house:

struct svc_i3c_master {
    struct i3c_master_controller base;
    struct device *dev;
    void __iomem *regs;
    struct svc_i3c_regs_save saved_regs;
    u32 free_slots;
    u8 addrs[SVC_I3C_MAX_DEVS];
    struct i3c_dev_desc *descs[SVC_I3C_MAX_DEVS];
    int irq;
    int num_clks;
    struct clk *fclk;
    struct clk_bulk_data *clks;
    struct {
      struct list_head list;
      struct svc_i3c_xfer *cur;
      spinlock_t lock;
    } xferqueue;
    struct {
      unsigned int num_slots;
      struct i3c_dev_desc **slots;
      struct i3c_ibi_slot *tbq_slot;
      spinlock_t lock;
    } ibi;
    struct mutex lock;
    const struct svc_i3c_drvdata *drvdata;
    u32 enabled_events;
    u32 mctrl_config;
 };

look at her. stunning. iconic. literally a work of art πŸŽ€


πŸ¦‹ Members πŸ¦‹

okay now the fun part β€” every field, explained, one by one:

  • base β€” the I3C master controller. this is the core bit πŸ’–
  • dev β€” the corresponding device. her device.
  • regs β€” the memory mapping. where the registers live.
  • saved_regs β€” volatile values kept around for PM operations (power management girlies, this one's for you) πŸ’€
  • free_slots β€” bit array of available slots.
  • addrs β€” array containing the dynamic addresses of each attached device. yes, dynamic.
  • descs β€” array of descriptors, one per attached device. one descs entry per device, no cap.
  • irq β€” the main interrupt. the big one. main character interrupt energy ⚑
  • num_clks β€” the I3C clock number.
  • fclk β€” the fast clock (bus).
  • clks β€” the I3C clock array.
  • xferqueue β€” the transfer queue structure πŸŒ€
    • xferqueue.list β€” list member.
    • xferqueue.cur β€” the current ongoing transfer.
    • xferqueue.lock β€” queue lock.
  • ibi β€” the IBI structure.
    • ibi.num_slots β€” number of slots available in ibi.slots.
    • ibi.slots β€” the available IBI slots.
    • ibi.tbq_slot β€” the to be queued IBI slot.
    • ibi.lock β€” IBI lock.
  • lock β€” transfer lock, protecting between the IBI work thread and callbacks from master. she's a struct mutex, she's doing the work 🫢
  • drvdata β€” driver data.
  • enabled_events β€” bit masks for enable events (IBI, HotJoin).
  • mctrl_config β€” configuration value in SVC_I3C_MCTRL for setting speed back.
ngl, that's a lot of spinlocks in one struct, but honestly? she's thriving.

πŸ”₯ SEE ALSO πŸ”₯

  • Kernel file ./drivers/i3c/master/svc-i3c-master.c struct svc_i3c_i2c_dev_data(9)

like, go read those too, they're literally cousins πŸ’–


aaaand that's the page!! ✨ you made it all the way through the struct, i'm so proud πŸ₯ΉπŸ’œ this was the Kernel API Manual, dated October 2026, sourced from ./drivers/i3c/master β€” mwah, slay, periodt, go read the source bestie πŸŽ€πŸ¦‹πŸŒΈ

πŸ“¦ where this page comes from