STRUCT STM32F7_I2C_MSG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– struct stm32f7_i2c_msg(9) πŸ’–

okay so bestie, welcome to the Kernel API Manual ✨ β€” this one's all about struct stm32f7_i2c_msg, and it's genuinely iconic. it's the little struct that holds client specific data for the STM32F7 I2C driver, and honestly? it ate. let's get into it πŸŽ€


πŸ¦‹ NAME πŸ¦‹

struct stm32f7_i2c_msg β€” client specific data πŸ’… that's it, that's the whole vibe. it's the per-message data holder, and she's serving exactly what she needs to serve.


✨ SYNOPSIS ✨

here's the whole struct, copied exactly, no edits, no cap 🫢:

struct stm32f7_i2c_msg {
    u16 addr;
    u32 count;
    u8 *buf;
    int result;
    bool stop;
    bool smbus;
    int size;
    char read_write;
    u8 smbus_buf[I2C_SMBUS_BLOCK_MAX + 3];
 };

like… look at her. structured. aligned. main character energy 🌈


🌸 Members 🌸

time for the member-by-member breakdown, and bestie I am obsessed with how organized this is πŸ“

  • addr β€” the 8-bit or 10-bit slave addr, and yes it includes the r/w bit ⭐ don't forget that part, iykyk.
  • count β€” the number of bytes to be transferred. literally just the byte count, no drama πŸ’œ
  • buf β€” the data buffer. she holds the data. queen behavior πŸ‘‘
  • result β€” the result of the transfer. how'd it go? this field knows πŸ™ˆ
  • stop β€” the last I2C msg to be sent, i.e. STOP to be generated. so like, if this is the final message, STOP gets generated. periodt πŸ’…
  • smbus β€” a boolean to know if the I2C IP is used in SMBus mode. true/false, simple as πŸ¦‹
  • size β€” the type of SMBus protocol. which protocol are we doing? this says πŸ”₯
  • read_write β€” the direction of the SMBus protocol β€” specifically for SMBus block read and SMBus block write block read process call protocols 🌈
  • smbus_buf β€” the buffer used for SMBus protocol transfer. it'll contain a maximum of 32 bytes of data + byte command + byte count + PEC ✨ and this is the important caveat bestie, listen up: this buffer has to be 32-bit aligned to be compliant with the memory address register in DMA mode. so don't be out here misaligning her 😭
ngl the alignment thing on smbus_buf is not a suggestion, it's a requirement β€” 32-bit aligned or it's not DMA-compliant. you've been warned πŸ’€

🧚 SEE ALSO 🧚

go read these next, bestie, they're all part of the same friend group 🫢:

  • Kernel file ./drivers/i2c/busses/i2c-stm32f7.c struct stm32f7_i2c_regs(9)
  • struct stm32f7_i2c_spec(9)
  • struct stm32f7_i2c_setup(9)
  • struct stm32f7_i2c_timings(9)
  • struct stm32f7_i2c_alert(9)
  • struct stm32f7_i2c_dev(9)

aaaand that's the whole page πŸ’– this one came to you from the source/version ./drivers/i2c/busses, dated October 2026 ✨ mwah, go forth and send some messages, you've got this πŸŽ€πŸ’…πŸŒŸ

πŸ“¦ where this page comes from