STRUCT STM32_SPI_CFG(9)

🎀 struct stm32_spi_cfg — stm32 compatible configuration data 🎀

okay so this is from the Kernel API Manual, and bestie, it's literally the blueprint for how an stm32 SPI controller gets configured. it's giving "backstage pass to the driver" energy 💅

✨ SYNOPSIS ✨

struct stm32_spi_cfg {
    const struct stm32_spi_regspec *regs;
    int (*get_fifo_size)(struct stm32_spi *spi);
    int (*get_bpw_mask)(struct stm32_spi *spi);
    void (*disable)(struct stm32_spi *spi);
    int (*config)(struct stm32_spi *spi);
    void (*set_bpw)(struct stm32_spi *spi);
    int (*set_mode)(struct stm32_spi *spi, unsigned int comm_type);
    void (*set_data_idleness)(struct stm32_spi *spi, struct spi_transfer *xfer);
    int (*set_number_of_data)(struct stm32_spi *spi, u32 length);
    void (*write_tx)(struct stm32_spi *spi);
    void (*read_rx)(struct stm32_spi *spi);
    void (*transfer_one_dma_start)(struct stm32_spi *spi);
    void (*dma_rx_cb)(void *data);
    void (*dma_tx_cb)(void *data);
    int (*transfer_one_irq)(struct stm32_spi *spi);
    int (*transfer_one_poll)(struct stm32_spi *spi);
    irqreturn_t (*irq_handler_event)(int irq, void *dev_id);
    irqreturn_t (*irq_handler_thread)(int irq, void *dev_id);
    unsigned int baud_rate_div_min;
    unsigned int baud_rate_div_max;
    bool has_fifo;
    bool has_device_mode;
    u16 flags;
    bool prevent_dma_burst;
};

🦋 MEMBERS 🦋

okay, member by member, no skips, we're doing the whole roster 💖

• regs — the register descriptions. literally the map of where everything lives 🗺️
• get_fifo_size — routine to get the fifo size.
• get_bpw_mask — routine to get the bits-per-word mask.
• disable — routine to disable the controller. bye bestie 👋
• config — routine to configure the controller as SPI Host.
• set_bpw — routine to configure registers for bits per word.
• set_mode — routine to configure registers to the desired mode.
• set_data_idleness — optional routine that configures the registers to the desired idle time between frames (only if the driver has this functionality, iykyk).
• set_number_of_data — optional routine that configures the registers to the desired number of data (again, only if the driver has this functionality ✨).
• write_tx — routine to write to the transmit register/FIFO. out she goes 📤
• read_rx — routine to read from the receive register/FIFO. in she comes 📥
• transfer_one_dma_start — routine to start transferring a single spi_transfer using DMA.
• dma_rx_cb — routine to call after the DMA RX channel operation is complete.
• dma_tx_cb — routine to call after the DMA TX channel operation is complete.
• transfer_one_irq — routine to configure interrupts for the driver.
• transfer_one_poll — routine to perform a transfer via register polling.
• irq_handler_event — interrupt handler for SPI controller events.
• irq_handler_thread — the thread of the interrupt handler for the SPI controller.
• baud_rate_div_min — the minimum baud rate divisor.
• baud_rate_div_max — the maximum baud rate divisor.
• has_fifo — boolean that tells you whether fifo is used for this driver.
• has_device_mode — is this compatible capable of switching on device mode? 👀
• flags — compatible-specific SPI controller flags, used at registration time.
• prevent_dma_burst — boolean that indicates you should prevent DMA burst. 🛑

🫶 ngl, this whole struct is basically a vtable of "hey driver, here's how you do the thing on this particular chip." every hw variant fills in its own answers.

🌈 SEE ALSO 🌈

Kernel file ./drivers/spi/spi-stm32.c, plus the whole extended friend group:

struct stm32_spi_reg(9), struct stm32_spi_regspec(9), struct stm32_spi(9), stm32h7_spi_get_fifo_size(9), stm32f4_spi_get_bpw_mask(9), stm32f7_spi_get_bpw_mask(9), stm32h7_spi_get_bpw_mask(9), stm32mp25_spi_get_bpw_mask(9), stm32_spi_prepare_mbr(9), stm32h7_spi_prepare_fthlv(9), stm32f4_spi_write_tx(9), stm32f7_spi_write_tx(9), stm32h7_spi_write_txfifo(9), stm32f4_spi_read_rx(9), stm32f7_spi_read_rx(9), stm32h7_spi_read_rxfifo(9), stm32_spi_enable(9), stm32fx_spi_disable(9), stm32h7_spi_disable(9), stm32_spi_can_dma(9), stm32fx_spi_irq_event(9), stm32fx_spi_irq_thread(9), stm32h7_spi_irq_thread(9), stm32_spi_prepare_msg(9), stm32fx_spi_dma_tx_cb(9), stm32_spi_dma_rx_cb(9), stm32_spi_dma_config(9), stm32fx_spi_transfer_one_irq(9), stm32h7_spi_transfer_one_poll(9), stm32h7_spi_transfer_one_irq(9), stm32fx_spi_transfer_one_dma_start(9), stm32f7_spi_transfer_one_dma_start(9), stm32h7_spi_transfer_one_dma_start(9), stm32_spi_prepare_rx_dma_mdma_chaining(9), stm32_spi_transfer_one_dma(9), stm32f4_spi_set_bpw(9), stm32f7_spi_set_bpw(9), stm32h7_spi_set_bpw(9), stm32_spi_set_mbr(9), stm32_spi_communication_type(9), stm32fx_spi_set_mode(9), stm32h7_spi_set_mode(9), stm32h7_spi_data_idleness(9), stm32h7_spi_number_of_data(9), stm32_spi_transfer_one_setup(9), stm32_spi_can_poll(9), stm32_spi_transfer_one(9), stm32_spi_unprepare_msg(9), stm32fx_spi_config(9), stm32h7_spi_config(9)

that's the whole page bestie, no crumbs left 💜 this lil icon shipped from ./drivers/spi and is dated October 2026 — go off, struct stm32_spi_cfg(9), you ate and left absolutely no notes 👑🌸