STRUCT STM32_SPI(9)

📦 version 7.3.1, in nixpkgs unstable

💖 struct stm32_spi(9) 💖

okay so bestie, welcome to the Kernel API Manual — this is the page for struct stm32_spi, aka the private data of the SPI controller. it's giving "backstage pass to the SPI vibe" and honestly? iconic. 🎀

✨ NAME ✨

struct stm32_spi — the private data of the SPI controller. no cap, this is where all the controller's personal business lives. 🙈

🌸 SYNOPSIS 🌸

here's the whole squad, laid out exactly how the kernel declares them:

       struct stm32_spi {
           struct device *dev;
           struct spi_controller *ctrl;
           const struct stm32_spi_cfg *cfg;
           void __iomem *base;
           struct clk *clk;
           u32 clk_rate;
           spinlock_t lock;
           int irq;
           unsigned int fifo_size;
           unsigned int t_size_max;
           unsigned int feature_set;
         #define STM32_SPI_FEATURE_LIMITED
       STM32MP25_SPI_HWCFGR1_FULLCFG_LIMITED   ;
         #define STM32_SPI_FEATURE_FULL
       STM32MP25_SPI_HWCFGR1_FULLCFG_FULL      ;
           unsigned int cur_midi;
           unsigned int cur_speed;
           unsigned int cur_half_period;
           unsigned int cur_bpw;
           unsigned int cur_fthlv;
           unsigned int cur_comm;
           unsigned int cur_xferlen;
           bool cur_usedma;
           const void *tx_buf;
           void *rx_buf;
           int tx_len;
           int rx_len;
           struct dma_chan *dma_tx;
           struct dma_chan *dma_rx;
           dma_addr_t phys_addr;
           bool device_mode;
           struct gen_pool *sram_pool;
           size_t sram_rx_buf_size;
           void *sram_rx_buf;
           dma_addr_t sram_dma_rx_buf;
           struct dma_chan *mdma_rx;
        };
fr fr, copy that block character for character — the #defines sitting inside there are STM32_SPI_FEATURE_LIMITED and STM32_SPI_FEATURE_FULL, and they're part of feature_set's whole situation. 🫶

🦋 Members 🦋

time for the member-by-member vibe check, bestie. every single one, no skipping. 💅

  • dev — the driver model representation of the controller. it's the controller's official ID photo. 📸
  • ctrl — the controller interface. the actual SPI controller hookup. 🔌
  • cfg — compatible configuration data. every compatible gets its own little outfit. 👗
  • base — the virtual memory area. where the registers hang out in memory. 🗺️
  • clk — the hw kernel clock feeding the SPI clock generator. the clock's clock, yes really. ⏰
  • clk_rate — the rate of the hw kernel clock feeding the SPI clock generator. same clock, but now with a number attached. 🔢
  • lock — prevents I/O concurrent access. one at a time, bestie, we're not doing chaos here. 🔒
  • irq — the SPI controller interrupt line. the "hey bestie, something happened" phone line. ☎️
  • fifo_size — size of the embedded fifo, in bytes. 🌊
  • t_size_max — the maximum number of data of one transfer. the ceiling, the limit, the "know your bounds". 📏
  • feature_set — SPI full or limited feature set. full feature set vs. limited feature set, and this field tells you which one you got. 🎚️
  • cur_midi — host inter-data idleness in ns. yes, ns. nanoseconds of doing nothing, on purpose. 😴
  • cur_speed — speed configured in Hz. 🏎️
  • cur_half_period — time of a half bit in us. half a bit! in microseconds! the precision of it all. ⏱️
  • cur_bpw — number of bits in a single SPI data frame. 🧮
  • cur_fthlv — fifo threshold level (data frames in a single data packet). 🚦
  • cur_comm — SPI communication mode. 🗣️
  • cur_xferlen — current transfer length in bytes. 📦
  • cur_usedma — boolean to know if dma is used in current transfer. true/false, dma or no dma. ✅
  • tx_buf — data to be written, or NULL. 📤
  • rx_buf — data to be read, or NULL. 📥
  • tx_len — number of data to be written, in bytes. 📤➡️🔢
  • rx_len — number of data to be read, in bytes. 🔢⬅️📥
  • dma_tx — dma channel for TX transfer. 🚚
  • dma_rx — dma channel for RX transfer. 🚛
  • phys_addr — SPI registers physical base address. the physical one, not the virtual one up in base. respect the distinction, bestie. 🏠
  • device_mode — the controller is configured as SPI device. plot twist: it's the device now. 🎭
  • sram_pool — SRAM pool for DMA transfers. 🏊
  • sram_rx_buf_size — size of SRAM buffer for RX transfer. 📐
  • sram_rx_buf — SRAM buffer for RX transfer. the buffer itself. 🧺
  • sram_dma_rx_buf — SRAM buffer physical address for RX transfer. again: the physical address. 🌍
  • mdma_rx — MDMA channel for RX transfer. not dma_rx — MDMA. different little guy entirely. 💀

👑 SEE ALSO 👑

everything below lives in the kernel file ./drivers/spi/spi-stm32.c — go say hi to the whole extended fam: 🌈

and that's the page, bestie 🫶 this lil masterpiece comes to you from ./drivers/spi, dated October 2026 — go forth and read your registers responsibly. periodt. 💜✨

📦 where this page comes from