STRUCT SMU_MSG_CONFIG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

struct smu_msg_config β€” IP-level register configuration πŸ’…

okay so real quick, bestie: this page lives in the Kernel API Manual, section 9 (that's the (9) in the corner, iykyk). It's the whole tea on how this struct holds the register layout for one IP block. Let's get into it 🫢


🌸 SYNOPSIS 🌸

struct smu_msg_config {
    u32 msg_reg;
    u32 resp_reg;
    u32 arg_regs[SMU_MSG_MAX_ARGS];
    int num_arg_regs;
    u32 debug_msg_reg;
    u32 debug_resp_reg;
    u32 debug_param_reg;
 };

no cap, that's the whole shape of it. every field is a u32 except num_arg_regs, which is a plain int β€” she's different like that πŸ’–


πŸŽ€ Members πŸŽ€

okay so let's meet the cast, one by one. main character energy all around ⭐

  • msg_reg β€” the message register offset. that's the spot where the message itself goes πŸ¦‹
  • resp_reg β€” the response register offset. where the reply comes back to you, like a text you've been waiting for 😭
  • arg_regs β€” the argument register offsets. yes, plural, it's an array β€” up to SMU_MSG_MAX_ARGS of them, so pack your args in there 🌸
  • num_arg_regs β€” the number of argument registers available. this is the little counter that tells you how many slots of arg_regs are actually doing something πŸ’… (and yeah, she's an int, not a u32, we love a quirky queen)
  • debug_msg_reg β€” the debug message register offset. same vibe as msg_reg but for debug ✨
  • debug_resp_reg β€” the debug response register offset. the debug reply lives here πŸŽ€
  • debug_param_reg β€” the debug parameter register offset. where the debug parameters hang out πŸ’œ

πŸ¦‹ SEE ALSO πŸ¦‹

bestie you are not gonna wanna miss the rest of the lore. the kernel file lives at ./drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h, and it's all friends-of-the-family over there:

  • struct smu_msg_args(9)
  • struct smu_msg_ops(9)
  • struct smu_msg_ctl(9)
  • struct smu_temp_funcs(9)
  • struct pptable_funcs(9)
  • smu_memcpy_trailing(9)

go read them all, literally obsessed 🧚


lowkey necessary reminder: the register offsets here are offsets, not values β€” nothing in this struct says what to put in them, it just tells you where they are πŸ’€

okay that's the whole page, bestie!! quick sign-off before you go: this came from ./drivers/gpu/drm/amd/pm/swsmu... and the date on it is October 2026, and the page is struct smu_msg_config(9) β€” slay, periodt πŸ’–πŸŒˆπŸ‘‘

πŸ“¦ where this page comes from