STRUCT SG2042_RPGATE_CLOCK(9)
π NAME π
okay so this page is struct sg2042_rpgate_clock(9) from the Kernel API Manual, and the struct itself is the Gate clock for RP(riscv processors) subsystem β literally what the NAME says, no cap. We're about to meet every single member, bestie. π
β¨ SYNOPSIS β¨
Here's the whole struct, copied exactly so you can trust it:
struct sg2042_rpgate_clock {
struct clk_hw hw;
unsigned int id;
u32 offset_enable;
u8 bit_idx;
};
that's the shape of it, periodt β¨
π Members π
hwβ theclk_hwfor initialization. init buddy energy, we love to see it πidβ used to mapclk_onecell_data. mapping duty, iconicoffset_enableβ offset of gate enable registers. registers have offsets, and this one is for gate enable π«Άbit_idxβ which bit in the register controls gating of this clock. the specific bit that controls gating, iykyk β
πΈ SEE ALSO πΈ
- Kernel file
./drivers/clk/sophgo/clk-sg2042-rpgate.cβ go read the kernel file, bestie, it's right there π
and that's the whole page! brought to you by the ./drivers/clk/sophgo source/version, dated October 2026, for struct sg2042_rpgate_clock(9) β mwah, bye bestie ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms