STRUCT SG2042_RPGATE_CLOCK(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

okay so this page is struct sg2042_rpgate_clock(9) from the Kernel API Manual, and the struct itself is the Gate clock for RP(riscv processors) subsystem β€” literally what the NAME says, no cap. We're about to meet every single member, bestie. πŸ’…

✨ SYNOPSIS ✨

Here's the whole struct, copied exactly so you can trust it:

struct sg2042_rpgate_clock {
    struct clk_hw hw;
    unsigned int id;
    u32 offset_enable;
    u8 bit_idx;
 };

that's the shape of it, periodt ✨

πŸŽ€ Members πŸŽ€

  • hw β€” the clk_hw for initialization. init buddy energy, we love to see it πŸ’œ
  • id β€” used to map clk_onecell_data. mapping duty, iconic
  • offset_enable β€” offset of gate enable registers. registers have offsets, and this one is for gate enable 🫢
  • bit_idx β€” which bit in the register controls gating of this clock. the specific bit that controls gating, iykyk ⭐

🌸 SEE ALSO 🌸

  • Kernel file ./drivers/clk/sophgo/clk-sg2042-rpgate.c β€” go read the kernel file, bestie, it's right there πŸ’–

and that's the whole page! brought to you by the ./drivers/clk/sophgo source/version, dated October 2026, for struct sg2042_rpgate_clock(9) β€” mwah, bye bestie πŸŽ€πŸ’–

πŸ“¦ where this page comes from