STRUCT SG2042_GATE_CLOCK(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… NAME πŸ’…

Okay bestie, meet struct sg2042_gate_clock(9) from the Kernel API Manual β€” aka the Gate clock struct. It’s giving tiny kernel-struct main character energy, and yes, every member matters. πŸŽ€


✨ SYNOPSIS ✨

       struct sg2042_gate_clock {
           struct clk_hw hw;
           unsigned int id;
           u32 offset_enable;
           u8 bit_idx;
        };

🫢 Members 🫢

  • hw β€” the clk_hw for initialization. Literally the starting point, no cap. πŸ’–
  • id β€” used to map clk_onecell_data. She’s the little identifier doing the mapping math. πŸ”₯
  • offset_enable β€” offset of gate enable registers. Think of it as the address-y vibe for the enable registers. ✨
  • bit_idx β€” which bit in the register controls gating of this clock. One specific bit holds all the power here. πŸ‘‘

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/clk/sophgo/clk-sg2042-clkgen.c
  • struct sg2042_divider_clock(9)
  • struct sg2042_mux_clock(9)

These are the besties in the same kernel file, so go say hi. πŸ¦‹


Cute little sign-off: this page comes from the source/version path ./drivers/clk/sophgo, dated October 2026, and the whole vibe is struct sg2042_gate_clock(9) from the Kernel API Manual. Periodt. πŸ’…πŸŒΈ
πŸ“¦ where this page comes from