STRUCT SDMA_PERIPHERAL_CONFIG(9)

✨ struct sdma_peripheral_config(9) ✨

okay so bestie, welcome to the Kernel API Manual 💖 this one's a struct page and honestly it's kind of a baddie — it's literally the little note you pass to the SDMA engine so it knows how many channels are doing the thing. let's get into it 🎀

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🌸 NAME 🌸

struct sdma_peripheral_config — the SDMA config for audio, no cap 🎧

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🦋 SYNOPSIS 🦋

struct sdma_peripheral_config {
    int n_fifos_src;
    int n_fifos_dst;
    int stride_fifos_src;
    int stride_fifos_dst;
    int words_per_fifo;
    bool sw_done;
 };

that's the whole vibe right there — six fields, all iconic, all necessary 💅

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👑 Members 👑

• n_fifos_src — how many FIFOs are doing the recording 🌸 this is the mic side, iykyk.
• n_fifos_dst — how many FIFOs are doing the playback 🔥 the speaker side, main character energy fr fr.
• stride_fifos_src — the FIFO address stride for recording. so like, 0 means all the FIFOs are continuous (one big happy family 🫶), and 1 means there's a 1 word stride between FIFOs. and bestie, listen — all the strides between FIFOs should be the same. don't be chaotic about it 💀
• stride_fifos_dst — the FIFO address stride for playback. same deal, other direction 💜
• words_per_fifo — the number of words per FIFO fetch/fill. 1 means one channel per FIFO, 2 means 2 channels per FIFO.. ok so picture this: if 'n_fifos_src = 4' and 'words_per_fifo = 2', that means the first two words (channels) fetch from FIFO0 and then it jumps to FIFO1 for the next two words, and so on — and after the last FIFO3 gets fetched, it rolls back around to FIFO0 🔁 it's giving carousel, it's giving round-robin, it's giving ✨graceful wraparound✨
• sw_done — use software done. Needed for PDM (micfil) ⚠️ like, actually needed, not optional-vibes. so if you're on micfil, don't skip it 😭

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💫 Description 💫

so here's the lore 📖 — some i.MX Audio devices (SAI, micfil) have multiple successive FIFO registers. for multichannel recording/playback, the SAI/micfil have one FIFO register per channel, and the SDMA engine has to read/write the next channel from/to the next register, and then wrap around to the first register when all the channels are handled 🌈

and the number of active channels must be communicated to the SDMA engine using this struct. like, that's the whole point of it, that's its job, that's its moment 👑

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🧚 SEE ALSO 🧚

• Kernel file ./include/linux/dma/imx-dma.h — go read it, bestie, it's right there 📚

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lowkey a reminder: sw_done is needed for PDM (micfil). this isn't a "maybe" situation, it's a "you will absolutely need this" situation 🙈

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and that's the page!! source is ./include/linux/dma, dated October 2026 — periodt, slay, go handle your channels correctly 💅🎀🦋