STRUCT SDMA_CONTEXT_DATA(9)

๐Ÿ“ฆ version 7.3.1, in nixpkgs unstable

๐Ÿ’… struct sdma_context_data(9)

okay so bestie, welcome to the Kernel API Manual โœจ โ€” this is the page for struct sdma_context_data, and yes we're gonna get through it together, no cap ๐Ÿซถ


๐ŸŒธ NAME ๐ŸŒธ

struct sdma_context_data โ€” the sdma context that's specific to one channel ๐ŸŽ€ (like, one channel's whole lil personality, locked in a struct)


โœจ SYNOPSIS โœจ

struct sdma_context_data {
    struct sdma_state_registers  channel_state;
    u32 gReg[8];
    u32 mda;
    u32 msa;
    u32 ms;
    u32 md;
    u32 pda;
    u32 psa;
    u32 ps;
    u32 pd;
    u32 ca;
    u32 cs;
    u32 dda;
    u32 dsa;
    u32 ds;
    u32 dd;
    u32 scratch0;
    u32 scratch1;
    u32 scratch2;
    u32 scratch3;
    u32 scratch4;
    u32 scratch5;
    u32 scratch6;
    u32 scratch7;
 };

๐Ÿฆ‹ Members ๐Ÿฆ‹

okay this is the part where we meet the whole cast, main character energy only ๐Ÿ‘‘

๐Ÿ’– the state bit

  • channel_state โ€” the channel state bits ๐Ÿ’ซ the vibe check of the whole channel, fr

๐ŸŽ€ the general registers

  • gReg โ€” general registers, a whole array of 8 of them, they're the general-purpose besties

๐Ÿ”ฅ burst dma crew

  • mda โ€” burst dma destination address register ๐Ÿ“ where it's going
  • msa โ€” burst dma source address register ๐Ÿ“ where it came from
  • ms โ€” burst dma status register ๐Ÿฉบ the current mood
  • md โ€” burst dma data register ๐Ÿ“ฆ the actual goodies

๐ŸŒˆ peripheral dma crew

  • pda โ€” peripheral dma destination address register ๐Ÿ“
  • psa โ€” peripheral dma source address register ๐Ÿ“
  • ps โ€” peripheral dma status register ๐Ÿฉบ
  • pd โ€” peripheral dma data register ๐Ÿ“ฆ

โญ the crc girlies

  • ca โ€” CRC polynomial register ๐Ÿงฎ the recipe
  • cs โ€” CRC accumulator register ๐Ÿงฎ the running total

๐Ÿ‘‘ dedicated core crew

  • dda โ€” dedicated core destination address register ๐Ÿ“
  • dsa โ€” dedicated core source address register ๐Ÿ“
  • ds โ€” dedicated core status register ๐Ÿฉบ
  • dd โ€” dedicated core data register ๐Ÿ“ฆ

๐Ÿงš scratch time (dedicated ram, for context switch)

  • scratch0 โ€” 1st word of dedicated ram for context switch ๐Ÿ“
  • scratch1 โ€” 2nd word of dedicated ram for context switch ๐Ÿ“
  • scratch2 โ€” 3rd word of dedicated ram for context switch ๐Ÿ“
  • scratch3 โ€” 4th word of dedicated ram for context switch ๐Ÿ“
  • scratch4 โ€” 5th word of dedicated ram for context switch ๐Ÿ“
  • scratch5 โ€” 6th word of dedicated ram for context switch ๐Ÿ“
  • scratch6 โ€” 7th word of dedicated ram for context switch ๐Ÿ“
  • scratch7 โ€” 8th word of dedicated ram for context switch ๐Ÿ“
not a single scratch word skipped, we ate that ๐Ÿ’…

๐Ÿ” SEE ALSO ๐Ÿ”

go read these next, bestie, they're all in the kernel file ./drivers/dma/imx-sdma.c ๐Ÿ‘€

  • struct sdma_channel_control(9)
  • struct sdma_state_registers(9)
  • struct sdma_desc(9)
  • struct sdma_channel(9)
  • struct sdma_firmware_header(9)

and that's the page!! ๐ŸŽ‰ this lil gem lives under ./drivers/dma and it's dated October 2026 โ€” so like, future iconic ๐Ÿ’œ mwah, go forth and dma responsibly ๐Ÿงšโœจ

๐Ÿ“ฆ where this page comes from