STRUCT ROCKCHIP_PIN_BANK(9)

🌸 NAME 🌸

okay bestie, welcome to the struct rockchip_pin_bank(9) page from the Kernel API Manual — and yes, the whole NAME section is literally just struct rockchip_pin_bank, dash included, no extra lore. iconic mysterious behavior, honestly 💅

✨ SYNOPSIS ✨

here’s the struct in all its glory — code is verbatim, don’t come for me:

struct rockchip_pin_bank {
    struct device                   *dev;
    void __iomem                    *reg_base;
    struct regmap                   *regmap_pull;
    struct regmap                   *regmap_ioc;
    struct clk                      *clk;
    struct clk                      *db_clk;
    int irq;
    u32 saved_masks;
    u32 pin_base;
    u8 nr_pins;
    char *name;
    u8 bank_num;
    struct rockchip_iomux           iomux[4];
    struct rockchip_drv             drv[4];
    enum rockchip_pin_pull_type     pull_type[4];
    bool valid;
    struct device_node              *of_node;
    struct rockchip_pinctrl         *drvdata;
    struct irq_domain               *domain;
    struct gpio_chip                gpio_chip;
    struct pinctrl_gpio_range       grange;
    raw_spinlock_t slock;
    const struct rockchip_gpio_regs *gpio_regs;
    u32 gpio_type;
    u32 toggle_edge_mode;
    u32 recalced_mask;
    u32 route_mask;
    struct list_head                deferred_pins;
    struct mutex                    deferred_lock;
};

🎀 Members 🎀

okay so every member gets its little moment, as it should 🫶

• dev — the pinctrl device bind to the bank.
• reg_base — register base of the gpio bank.
• regmap_pull — optional separate register for additional pull settings.
• regmap_ioc — optional per-bank IO control regmap, for SoCs where each bank has its own IOC block.
• clk — clock of the gpio bank.
• db_clk — clock of the gpio debounce.
• irq — interrupt of the gpio bank.
• saved_masks — saved content of GPIO_INTEN at suspend time.
• pin_base — first pin number.
• nr_pins — number of pins in this bank.
• name — name of the bank.
• bank_num — number of the bank, to account for holes.
• iomux — array describing the 4 iomux sources of the bank.
• drv — array describing the 4 drive strength sources of the bank.
• pull_type — array describing the 4 pull type sources of the bank.
• valid — is all necessary information present.
• of_node — dt node of this bank.
• drvdata — common pinctrl basedata.
• domain — irqdomain of the gpio bank.
• gpio_chip — gpiolib chip.
• grange — gpio range.
• slock — spinlock for the gpio bank.
• toggle_edge_mode — bit mask to toggle (falling/rising) edge mode.
• recalced_mask — bit mask to indicate a need to recalulate the mask. (page’s spelling, not mine 😭)
• route_mask — bits describing the routing pins of per bank.
• deferred_lock — mutex for the deferred_output shared btw gpio and pinctrl.

also chilling in the synopsis but not given a member blurb on this page: gpio_regs, gpio_type, and deferred_pins. I’m not gonna invent descriptions for them 🙈

🌈 SEE ALSO 🌈

go look at these if you’re deep in the pinctrl lore:

• Kernel file ./drivers/pinctrl/pinctrl-rockchip.h
• struct rockchip_gpio_regs(9)
• struct rockchip_iomux(9)
• struct rockchip_drv(9)
• struct rockchip_mux_recalced_data(9)
• struct rockchip_pin_group(9)
• struct rockchip_pmx_func(9)

okay bye bestie — source/version: ./drivers/pinctrl, date: October 2026, manual: struct rockchip_pin_bank(9). slay 💅✨