STRUCT ROCKCHIP_GPIO_REGS(9)
β¨ struct rockchip_gpio_regs(9) β¨
okay bestie, welcome to the Kernel API Manual π β this is the page for struct rockchip_gpio_regs, and honestly? it's giving register map realness. it's a struct, it's all u32s, and every single one of them is a GPIO register on Rockchip SoCs. no cap. let's get into it π
πΈ NAME πΈ
struct rockchip_gpio_regs β literally just the struct, that's it. the original page gives it a big fat dash and no description, and we respect that kind of main character energy π
β¨ SYNOPSIS β¨
here's the whole thing, bestie, copied exactly so you can't mess it up:
struct rockchip_gpio_regs {
u32 port_dr;
u32 port_ddr;
u32 int_en;
u32 int_mask;
u32 int_type;
u32 int_polarity;
u32 int_bothedge;
u32 int_status;
u32 int_rawstatus;
u32 debounce;
u32 dbclk_div_en;
u32 dbclk_div_con;
u32 port_eoi;
u32 ext_port;
u32 version_id;
};
fifteen u32s. one struct. absolutely iconic π₯
π¦ Members π¦
okay so let's go member by member, no skips, no shortcuts π
port_drβ the data register. that's the one, that's the data πport_ddrβ the data direction register. it decides who's an input and who's an output. vibe check for pins β¨int_enβ interrupt enable. turn it on, bestie π«Άint_maskβ interrupt mask. the bouncer at the club, decides which interrupts actually get through πͺint_typeβ the interrupt trigger type, like high, low, or edge trigger type. yeah it comes in flavors πint_polarityβ interrupt polarity enable register. it's the "which way round tho" register πint_bothedgeβ interrupt bothedge enable register. both edges! not just one! generous queen πint_statusβ the interrupt status register. the receipts πint_rawstatusβ and the relationship is exactly this:int_status = int_rawstatus & int_mask. raw status, masked. that's the whole tea πdebounceβ enables debounce for the interrupt signal. so your signal stops being all jittery and chaotic πdbclk_div_enβ enables the divider for the debounce clock. divider: unlocked π₯dbclk_div_conβ the actual setting for the divider of the debounce clock. this is where you put the number, iykyk βport_eoiβ end of interrupt of the port. eoi = end of interrupt, say it with me πext_portβ port data from external. looking at the pin from the outside like πversion_idβ the controller version register. every queen has a version tbh π
π« SEE ALSO π«
- Kernel file
./drivers/pinctrl/pinctrl-rockchip.hstructrockchip_iomux(9) struct rockchip_drv(9)struct rockchip_pin_bank(9)struct rockchip_mux_recalced_data(9)struct rockchip_pin_group(9)struct rockchip_pmx_func(9)
go read those next, bestie, they're all in the same friend group π§
lowkey a note: this whole page is straight out of the pinctrl corner of the kernel, so if you're poking at ./drivers/pinctrl/pinctrl-rockchip.h you're exactly where you're supposed to be π
and that's the whole page! sign-off time: this one comes from ./drivers/pinctrl, dated October 2026, and it's struct rockchip_gpio_regs(9) β slay, periodt, go read the registers π¦π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms