STRUCT ROCKCHIP_GPIO_REGS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct rockchip_gpio_regs(9) ✨

okay bestie, welcome to the Kernel API Manual πŸ’– β€” this is the page for struct rockchip_gpio_regs, and honestly? it's giving register map realness. it's a struct, it's all u32s, and every single one of them is a GPIO register on Rockchip SoCs. no cap. let's get into it πŸŽ€


🌸 NAME 🌸

struct rockchip_gpio_regs β€” literally just the struct, that's it. the original page gives it a big fat dash and no description, and we respect that kind of main character energy πŸ’…


✨ SYNOPSIS ✨

here's the whole thing, bestie, copied exactly so you can't mess it up:

struct rockchip_gpio_regs {
    u32 port_dr;
    u32 port_ddr;
    u32 int_en;
    u32 int_mask;
    u32 int_type;
    u32 int_polarity;
    u32 int_bothedge;
    u32 int_status;
    u32 int_rawstatus;
    u32 debounce;
    u32 dbclk_div_en;
    u32 dbclk_div_con;
    u32 port_eoi;
    u32 ext_port;
    u32 version_id;
 };

fifteen u32s. one struct. absolutely iconic πŸ”₯


πŸ¦‹ Members πŸ¦‹

okay so let's go member by member, no skips, no shortcuts πŸ‘‘

  • port_dr β€” the data register. that's the one, that's the data πŸ’œ
  • port_ddr β€” the data direction register. it decides who's an input and who's an output. vibe check for pins ✨
  • int_en β€” interrupt enable. turn it on, bestie 🫢
  • int_mask β€” interrupt mask. the bouncer at the club, decides which interrupts actually get through πŸšͺ
  • int_type β€” the interrupt trigger type, like high, low, or edge trigger type. yeah it comes in flavors 😭
  • int_polarity β€” interrupt polarity enable register. it's the "which way round tho" register πŸ’…
  • int_bothedge β€” interrupt bothedge enable register. both edges! not just one! generous queen πŸ‘‘
  • int_status β€” the interrupt status register. the receipts πŸ’€
  • int_rawstatus β€” and the relationship is exactly this: int_status = int_rawstatus & int_mask. raw status, masked. that's the whole tea πŸ“
  • debounce β€” enables debounce for the interrupt signal. so your signal stops being all jittery and chaotic πŸ™ˆ
  • dbclk_div_en β€” enables the divider for the debounce clock. divider: unlocked πŸ”₯
  • dbclk_div_con β€” the actual setting for the divider of the debounce clock. this is where you put the number, iykyk ⭐
  • port_eoi β€” end of interrupt of the port. eoi = end of interrupt, say it with me πŸŽ€
  • ext_port β€” port data from external. looking at the pin from the outside like πŸ‘€
  • version_id β€” the controller version register. every queen has a version tbh 🌈

πŸ’« SEE ALSO πŸ’«

  • Kernel file ./drivers/pinctrl/pinctrl-rockchip.h struct rockchip_iomux(9)
  • struct rockchip_drv(9)
  • struct rockchip_pin_bank(9)
  • struct rockchip_mux_recalced_data(9)
  • struct rockchip_pin_group(9)
  • struct rockchip_pmx_func(9)

go read those next, bestie, they're all in the same friend group 🧚


lowkey a note: this whole page is straight out of the pinctrl corner of the kernel, so if you're poking at ./drivers/pinctrl/pinctrl-rockchip.h you're exactly where you're supposed to be πŸ’–

and that's the whole page! sign-off time: this one comes from ./drivers/pinctrl, dated October 2026, and it's struct rockchip_gpio_regs(9) β€” slay, periodt, go read the registers πŸ¦‹πŸ’…

πŸ“¦ where this page comes from