STRUCT RISCV_IOMMU_FQ_RECORD(9)

🦋 struct riscv_iommu_fq_record(9) — Fault/Event Queue Record 💅

okay so this is from the Kernel API Manual, and bestie, it's giving "tiny struct, big responsibilities." Let's get into it ✨

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🌸 NAME 🌸

struct riscv_iommu_fq_record — the Fault/Event Queue Record, aka the little guy that holds the receipts for everything the fault/event queue catches 🎀

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✨ SYNOPSIS ✨

struct riscv_iommu_fq_record {
    u64 hdr;
    u64 _reserved;
    u64 iotval;
    u64 iotval2;
 };

that's it. four u64s. no cap, that's the whole vibe 💜

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🫶 Members 🫶

• hdr — the header, and she's the main character 👑 she's got the fault/event cause, the PID/DID, the transaction type, etc. all the iconic identifying info lives here.
• _reserved — the "we left room for you" field 💖 low 32 bits are for custom use, high 32 bits are for standard use. literally reserved seating, iykyk.
• iotval — formatting that's specific to the transaction-type/cause 🦋 she changes based on what kind of chaos happened.
• iotval2 — same energy, but cause-specific this time 🌈

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🔥 Description 🔥

so the fault/event queue is literally out here reporting events and failures raised when processing transactions — like a group chat notification every time something goes down 📲

each record is a 32byte structure. the first dword has a fixed format for providing generic infos regarding the fault/event, and then there are two more dwords for fault/event-specific information. so like, one dword is the "what happened" starter pack, and the other two are the details that depend on what happened. periodt 💅

for more details see section 3.2. go read it, bestie, I believe in you 🧚

💀 lowkey important: every field is u64, and the whole record is 32 bytes — that's four u64s doing their thing. don't go messing with the layout, the hardware is obsessed with it.

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⭐ SEE ALSO ⭐

Kernel file ./drivers/iommu/riscv/iommu-bits.h enum riscv_iommu_igs_settings(9), enum riscv_iommu_ddtp_modes(9), enum riscv_iommu_hpmevent_id(9), struct riscv_iommu_dc(9), enum riscv_iommu_dc_iohgatp_modes(9), enum riscv_iommu_dc_fsc_atp_modes(9), struct riscv_iommu_pc(9), struct riscv_iommu_command(9), enum riscv_iommu_fq_causes(9), enum riscv_iommu_fq_ttypes(9), struct riscv_iommu_pq_record(9), struct riscv_iommu_msipte(9)

like, the whole RISC-V IOMMU friend group honestly 🫶 go say hi to all of them.

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and that's the page, bestie 💜 this came from the Kernel API Manual, lives under ./drivers/iommu/riscv, and the date on it is October 2026 — so mark your calendar and slay the day ✨👑🎀