STRUCT RISCV_IOMMU_DC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct riscv_iommu_dc(9) ✨

okay bestie, welcome to the Kernel API Manual β€” this is the page for struct riscv_iommu_dc(9), and yes it's giving "tiny struct, big responsibilities" energy πŸ’…


πŸŽ€ NAME πŸŽ€

struct riscv_iommu_dc β€” the Device Context 🫢 literally what it says on the tin.


🌸 SYNOPSIS 🌸

struct riscv_iommu_dc {
    u64 tc;
    u64 iohgatp;
    u64 ta;
    u64 fsc;
    u64 msiptp;
    u64 msi_addr_mask;
    u64 msi_addr_pattern;
    u64 _reserved;
 };

πŸ’– Members πŸ’–

girl, let's go field by field, no skipping, we do not skip in this house πŸ‘‘

  • tc β€” Translation Control πŸ”₯
  • iohgatp β€” I/O Hypervisor guest address translation and protection (that's the Second stage context, iykyk) ✨
  • ta β€” Translation Attributes πŸŽ€
  • fsc β€” First stage context πŸ’œ
  • msiptp β€” MSI page table pointer 🌸
  • msi_addr_mask β€” MSI address mask 🌈
  • msi_addr_pattern β€” MSI address pattern ⭐
  • _reserved β€” Reserved for future use, padding πŸ¦‹ (sitting there being mysterious, we respect it)

🧚 Description 🧚

so this struct is what the leaf nodes on the Device Directory Table use, fr fr. main character energy of the DDT πŸ₯°

but here's the plot twist 😭 β€” in case RISCV_IOMMU_CAPABILITIES_MSI_FLAT is not set, the bottom 4 fields are not present and are skipped with pointer arithmetic to avoid casting. yep, pointer arithmetic, we love a clever little workaround. you can check out riscv_iommu_get_dc if you wanna see it in action πŸ’«

πŸ’‘ also: see section 2.1 for more details β€” the og docs said it, we're saying it.

πŸ‘€ SEE ALSO πŸ‘€

Kernel file ./drivers/iommu/riscv/iommu-bits.h enum πŸ” and the whole friend group:

  • riscv_iommu_igs_settings(9)
  • enum riscv_iommu_ddtp_modes(9)
  • enum riscv_iommu_hpmevent_id(9)
  • enum riscv_iommu_dc_iohgatp_modes(9)
  • enum riscv_iommu_dc_fsc_atp_modes(9)
  • struct riscv_iommu_pc(9)
  • struct riscv_iommu_command(9)
  • struct riscv_iommu_fq_record(9)
  • enum riscv_iommu_fq_causes(9)
  • enum riscv_iommu_fq_ttypes(9)
  • struct riscv_iommu_pq_record(9)
  • struct riscv_iommu_msipte(9)

and that's the whole page bestie, you ate that πŸ“ mwah πŸ’‹

source: ./drivers/iommu/riscv 🌸 date: October 2026 🌸 struct riscv_iommu_dc(9) β€” slay, go read some iommu code now πŸ‘‘βœ¨

πŸ“¦ where this page comes from